Lines Matching refs:W
25 R1 = W[P0](z);
27 W[P0] = R1.L;
74 W[P0] = R3.L;
103 R6 = W[P0](z);
105 W[P0] = R0.l; /* Set Max VCO to SCLK divider */
109 R5 = W[P0](z);
111 W[P0] = R0.l; /* Set Min CLKIN to VCO multiplier */
120 R7 = W[P0](z);
127 W[P0] = R2; /* Set Min Core Voltage */
141 R0 = W[P0](z);
143 W[P0] = R0.L; /* Turn CCLK OFF */
157 W[P0]= R7;
166 W[P0]= R6; /* Restore CCLK and SCLK divider */
291 R0 = W[P0] (Z);