Lines Matching refs:ia64_setreg
441 case 0: ia64_setreg(_IA64_REG_AR_KR0, r); break; \
442 case 1: ia64_setreg(_IA64_REG_AR_KR1, r); break; \
443 case 2: ia64_setreg(_IA64_REG_AR_KR2, r); break; \
444 case 3: ia64_setreg(_IA64_REG_AR_KR3, r); break; \
445 case 4: ia64_setreg(_IA64_REG_AR_KR4, r); break; \
446 case 5: ia64_setreg(_IA64_REG_AR_KR5, r); break; \
447 case 6: ia64_setreg(_IA64_REG_AR_KR6, r); break; \
448 case 7: ia64_setreg(_IA64_REG_AR_KR7, r); break; \
538 ia64_setreg(_IA64_REG_PSR_L, psr); in ia64_set_psr()
551 ia64_setreg(_IA64_REG_CR_ITIR, (log_page_size << 2)); in ia64_itr()
552 ia64_setreg(_IA64_REG_CR_IFA, vmaddr); in ia64_itr()
568 ia64_setreg(_IA64_REG_CR_ITIR, (log_page_size << 2)); in ia64_itc()
569 ia64_setreg(_IA64_REG_CR_IFA, vmaddr); in ia64_itc()
595 ia64_setreg(_IA64_REG_CR_IVA, (__u64) ivt_addr); in ia64_set_iva()
604 ia64_setreg(_IA64_REG_CR_PTA, pta); in ia64_set_pta()
611 ia64_setreg(_IA64_REG_CR_EOI, 0); in ia64_eoi()
637 ia64_setreg(_IA64_REG_CR_LRR0, val); in ia64_set_lrr0()
644 ia64_setreg(_IA64_REG_CR_LRR1, val); in ia64_set_lrr1()