Lines Matching refs:ia64_set_rr
106 ia64_set_rr(VRN0<<VRN_SHIFT, vcpu->arch.metaphysical_rr0); in switch_to_physical_rid()
108 ia64_set_rr(VRN4<<VRN_SHIFT, vcpu->arch.metaphysical_rr4); in switch_to_physical_rid()
121 ia64_set_rr(VRN0 << VRN_SHIFT, vcpu->arch.metaphysical_saved_rr0); in switch_to_virtual_rid()
123 ia64_set_rr(VRN4 << VRN_SHIFT, vcpu->arch.metaphysical_saved_rr4); in switch_to_virtual_rid()
1451 ia64_set_rr(reg, rrval); in vcpu_set_rr()
1457 ia64_set_rr(reg, rrval); in vcpu_set_rr()
1460 ia64_set_rr(reg, vrrtomrr(val)); in vcpu_set_rr()
2110 ia64_set_rr((VRN0 << VRN_SHIFT), vcpu->arch.metaphysical_rr0); in kvm_init_all_rr()
2112 ia64_set_rr((VRN4 << VRN_SHIFT), vcpu->arch.metaphysical_rr4); in kvm_init_all_rr()
2115 ia64_set_rr((VRN0 << VRN_SHIFT), in kvm_init_all_rr()
2118 ia64_set_rr((VRN4 << VRN_SHIFT), in kvm_init_all_rr()
2122 ia64_set_rr((VRN1 << VRN_SHIFT), in kvm_init_all_rr()
2125 ia64_set_rr((VRN2 << VRN_SHIFT), in kvm_init_all_rr()
2128 ia64_set_rr((VRN3 << VRN_SHIFT), in kvm_init_all_rr()
2131 ia64_set_rr((VRN5 << VRN_SHIFT), in kvm_init_all_rr()
2134 ia64_set_rr((VRN7 << VRN_SHIFT), in kvm_init_all_rr()