Lines Matching refs:_SB_MAKE64
59 #define S_DMA_DESC_TYPE _SB_MAKE64(1)
78 #define S_DMA_INT_PKTCNT _SB_MAKE64(8)
83 #define S_DMA_RINGSZ _SB_MAKE64(16)
88 #define S_DMA_HIGH_WATERMARK _SB_MAKE64(32)
93 #define S_DMA_LOW_WATERMARK _SB_MAKE64(48)
121 #define S_DMA_HDR_SIZE _SB_MAKE64(21)
128 #define S_DMA_ASICXFR_SIZE _SB_MAKE64(37)
133 #define S_DMA_INT_TIMEOUT _SB_MAKE64(48)
162 #define S_DMA_CURDSCR_ADDR _SB_MAKE64(0)
164 #define S_DMA_CURDSCR_COUNT _SB_MAKE64(40)
175 #define S_DMA_OODLOST_RX _SB_MAKE64(0)
179 #define S_DMA_EOP_COUNT_RX _SB_MAKE64(16)
192 #define S_DMA_DSCRA_OFFSET _SB_MAKE64(0)
198 #define S_DMA_DSCRA_A_ADDR _SB_MAKE64(5)
204 #define S_DMA_DSCRA_A_ADDR_UA _SB_MAKE64(0)
208 #define S_DMA_DSCRA_A_SIZE _SB_MAKE64(40)
214 #define S_DMA_DSCRA_DSCR_CNT _SB_MAKE64(40)
222 #define S_DMA_DSCRA_STATUS _SB_MAKE64(51)
232 #define S_DMA_DSCRB_OPTIONS _SB_MAKE64(0)
238 #define S_DMA_DSCRB_A_SIZE _SB_MAKE64(8)
244 #define R_DMA_DSCRB_ADDR _SB_MAKE64(0x10)
247 #define S_DMA_DSCRB_B_ADDR _SB_MAKE64(5)
250 #define S_DMA_DSCRB_B_SIZE _SB_MAKE64(40)
258 #define S_DMA_DSCRB_PKT_SIZE_MSB _SB_MAKE64(48)
264 #define S_DMA_DSCRB_PKT_SIZE _SB_MAKE64(50)
272 #define S_DMA_DSCRB_STATUS _SB_MAKE64(0)
331 #define K_DMA_ETHTX_NOTSOP _SB_MAKE64(0x00)
332 #define K_DMA_ETHTX_APPENDCRC _SB_MAKE64(0x01)
333 #define K_DMA_ETHTX_REPLACECRC _SB_MAKE64(0x02)
334 #define K_DMA_ETHTX_APPENDCRC_APPENDPAD _SB_MAKE64(0x03)
335 #define K_DMA_ETHTX_APPENDVLAN_REPLACECRC _SB_MAKE64(0x04)
336 #define K_DMA_ETHTX_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x05)
337 #define K_DMA_ETHTX_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x6)
338 #define K_DMA_ETHTX_NOMODS _SB_MAKE64(0x07)
339 #define K_DMA_ETHTX_RESERVED1 _SB_MAKE64(0x08)
340 #define K_DMA_ETHTX_REPLACESADDR_APPENDCRC _SB_MAKE64(0x09)
341 #define K_DMA_ETHTX_REPLACESADDR_REPLACECRC _SB_MAKE64(0x0A)
342 #define K_DMA_ETHTX_REPLACESADDR_APPENDCRC_APPENDPAD _SB_MAKE64(0x0B)
343 #define K_DMA_ETHTX_REPLACESADDR_APPENDVLAN_REPLACECRC _SB_MAKE64(0x0C)
344 #define K_DMA_ETHTX_REPLACESADDR_REMOVEVLAN_REPLACECRC _SB_MAKE64(0x0D)
345 #define K_DMA_ETHTX_REPLACESADDR_REPLACEVLAN_REPLACECRC _SB_MAKE64(0x0E)
346 #define K_DMA_ETHTX_RESERVED2 _SB_MAKE64(0x0F)
391 #define S_DM_DSCR_BASE_ADDR _SB_MAKE64(4)
394 #define S_DM_DSCR_BASE_RINGSZ _SB_MAKE64(40)
399 #define S_DM_DSCR_BASE_PRIORITY _SB_MAKE64(56)
431 #define S_DM_CUR_DSCR_DSCR_ADDR _SB_MAKE64(0)
434 #define S_DM_CUR_DSCR_DSCR_COUNT _SB_MAKE64(48)
449 #define S_DM_PARTIAL_CRC_PARTIAL _SB_MAKE64(0)
455 #define S_DM_PARTIAL_TCPCS_PARTIAL _SB_MAKE64(32)
471 #define S_CRC_DEF_CRC_INIT _SB_MAKE64(0)
477 #define S_CRC_DEF_CRC_POLY _SB_MAKE64(32)
491 #define S_CTCP_DEF_CRC_TXOR _SB_MAKE64(0)
497 #define S_CTCP_DEF_TCPCS_INIT _SB_MAKE64(32)
503 #define S_CTCP_DEF_CRC_WIDTH _SB_MAKE64(48)
521 #define S_DM_DSCRA_DST_ADDR _SB_MAKE64(0)
531 #define S_DM_DSCRA_DIR_DEST _SB_MAKE64(44)
544 #define S_DM_DSCRA_DIR_SRC _SB_MAKE64(46)
585 #define S_DM_DSCRB_SRC_ADDR _SB_MAKE64(0)
588 #define S_DM_DSCRB_SRC_LENGTH _SB_MAKE64(40)