155 	struct drv_cmd *cmd = _cmd;  in do_drv_read()  local
158 	switch (cmd->type) {  in do_drv_read()
160 		rdmsr(cmd->addr.msr.reg, cmd->val, h);  in do_drv_read()
163 		acpi_os_read_port((acpi_io_address)cmd->addr.io.port,  in do_drv_read()
164 				&cmd->val,  in do_drv_read()
165 				(u32)cmd->addr.io.bit_width);  in do_drv_read()
175 	struct drv_cmd *cmd = _cmd;  in do_drv_write()  local
178 	switch (cmd->type) {  in do_drv_write()
180 		rdmsr(cmd->addr.msr.reg, lo, hi);  in do_drv_write()
181 		lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);  in do_drv_write()
182 		wrmsr(cmd->addr.msr.reg, lo, hi);  in do_drv_write()
185 		acpi_os_write_port((acpi_io_address)cmd->addr.io.port,  in do_drv_write()
186 				cmd->val,  in do_drv_write()
187 				(u32)cmd->addr.io.bit_width);  in do_drv_write()
195 static void drv_read(struct drv_cmd *cmd)  in drv_read()  argument
197 	cmd->val = 0;  in drv_read()
199 	work_on_cpu(cpumask_any(cmd->mask), do_drv_read, cmd);  in drv_read()
202 static void drv_write(struct drv_cmd *cmd)  in drv_write()  argument
206 	for_each_cpu(i, cmd->mask) {  in drv_write()
207 		work_on_cpu(i, do_drv_write, cmd);  in drv_write()
214 	struct drv_cmd cmd;  in get_cur_val()  local
221 		cmd.type = SYSTEM_INTEL_MSR_CAPABLE;  in get_cur_val()
222 		cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;  in get_cur_val()
225 		cmd.type = SYSTEM_IO_CAPABLE;  in get_cur_val()
227 		cmd.addr.io.port = perf->control_register.address;  in get_cur_val()
228 		cmd.addr.io.bit_width = perf->control_register.bit_width;  in get_cur_val()
234 	cmd.mask = mask;  in get_cur_val()
235 	drv_read(&cmd);  in get_cur_val()
237 	dprintk("get_cur_val = %u\n", cmd.val);  in get_cur_val()
239 	return cmd.val;  in get_cur_val()
387 	struct drv_cmd cmd;  in acpi_cpufreq_target()  local
428 		cmd.type = SYSTEM_INTEL_MSR_CAPABLE;  in acpi_cpufreq_target()
429 		cmd.addr.msr.reg = MSR_IA32_PERF_CTL;  in acpi_cpufreq_target()
430 		cmd.val = (u32) perf->states[next_perf_state].control;  in acpi_cpufreq_target()
433 		cmd.type = SYSTEM_IO_CAPABLE;  in acpi_cpufreq_target()
434 		cmd.addr.io.port = perf->control_register.address;  in acpi_cpufreq_target()
435 		cmd.addr.io.bit_width = perf->control_register.bit_width;  in acpi_cpufreq_target()
436 		cmd.val = (u32) perf->states[next_perf_state].control;  in acpi_cpufreq_target()
445 		cmd.mask = policy->cpus;  in acpi_cpufreq_target()
447 		cmd.mask = cpumask_of(policy->cpu);  in acpi_cpufreq_target()
451 	for_each_cpu(i, cmd.mask) {  in acpi_cpufreq_target()
456 	drv_write(&cmd);  in acpi_cpufreq_target()
459 		if (!check_freqs(cmd.mask, freqs.new, data)) {  in acpi_cpufreq_target()
467 	for_each_cpu(i, cmd.mask) {  in acpi_cpufreq_target()