537 static int mv_stop_edma_engine(void __iomem *port_mmio);
797 static void mv_set_edma_ptrs(void __iomem *port_mmio,  in mv_set_edma_ptrs()  argument
810 	writel((pp->crqb_dma >> 16) >> 16, port_mmio + EDMA_REQ_Q_BASE_HI_OFS);  in mv_set_edma_ptrs()
812 		 port_mmio + EDMA_REQ_Q_IN_PTR_OFS);  in mv_set_edma_ptrs()
813 	writelfl(index, port_mmio + EDMA_REQ_Q_OUT_PTR_OFS);  in mv_set_edma_ptrs()
822 	writel((pp->crpb_dma >> 16) >> 16, port_mmio + EDMA_RSP_Q_BASE_HI_OFS);  in mv_set_edma_ptrs()
823 	writelfl(index, port_mmio + EDMA_RSP_Q_IN_PTR_OFS);  in mv_set_edma_ptrs()
825 		 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);  in mv_set_edma_ptrs()
866 static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio,  in mv_start_dma()  argument
884 		writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);  in mv_start_dma()
894 			writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);  in mv_start_dma()
896 		mv_set_edma_ptrs(port_mmio, hpriv, pp);  in mv_start_dma()
899 		writelfl(EDMA_EN, port_mmio + EDMA_CMD_OFS);  in mv_start_dma()
906 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_wait_for_edma_empty_idle()  local
919 		u32 edma_stat = readl(port_mmio + EDMA_STATUS_OFS);  in mv_wait_for_edma_empty_idle()
934 static int mv_stop_edma_engine(void __iomem *port_mmio)  in mv_stop_edma_engine()  argument
939 	writelfl(EDMA_DS, port_mmio + EDMA_CMD_OFS);  in mv_stop_edma_engine()
943 		u32 reg = readl(port_mmio + EDMA_CMD_OFS);  in mv_stop_edma_engine()
953 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_stop_edma()  local
960 	if (mv_stop_edma_engine(port_mmio)) {  in mv_stop_edma()
1133 static void mv_config_fbs(void __iomem *port_mmio, int want_ncq, int want_fbs)  in mv_config_fbs()  argument
1139 	old_fiscfg   = readl(port_mmio + FISCFG_OFS);  in mv_config_fbs()
1140 	old_ltmode   = readl(port_mmio + LTMODE_OFS);  in mv_config_fbs()
1141 	old_haltcond = readl(port_mmio + EDMA_HALTCOND_OFS);  in mv_config_fbs()
1157 		writelfl(new_fiscfg, port_mmio + FISCFG_OFS);  in mv_config_fbs()
1159 		writelfl(new_ltmode, port_mmio + LTMODE_OFS);  in mv_config_fbs()
1161 		writelfl(new_haltcond, port_mmio + EDMA_HALTCOND_OFS);  in mv_config_fbs()
1184 	void __iomem *port_mmio    = mv_ap_base(ap);  in mv_edma_cfg()  local
1209 		mv_config_fbs(port_mmio, want_ncq, want_fbs);  in mv_edma_cfg()
1230 	writelfl(cfg, port_mmio + EDMA_CFG_OFS);  in mv_edma_cfg()
1562 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_qc_issue()  local
1597 	mv_start_dma(ap, port_mmio, pp, qc->tf.protocol);  in mv_qc_issue()
1604 		 port_mmio + EDMA_REQ_Q_IN_PTR_OFS);  in mv_qc_issue()
1651 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_get_err_pmp_map()  local
1653 	return readl(port_mmio + SATA_TESTCTL_OFS) >> 16;  in mv_get_err_pmp_map()
1683 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_req_q_empty()  local
1686 	in_ptr  = (readl(port_mmio + EDMA_REQ_Q_IN_PTR_OFS)  in mv_req_q_empty()
1688 	out_ptr = (readl(port_mmio + EDMA_REQ_Q_OUT_PTR_OFS)  in mv_req_q_empty()
1832 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_err_intr()  local
1850 	edma_err_cause = readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);  in mv_err_intr()
1852 		fis_cause = readl(port_mmio + SATA_FIS_IRQ_CAUSE_OFS);  in mv_err_intr()
1853 		writelfl(~fis_cause, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);  in mv_err_intr()
1855 	writelfl(~edma_err_cause, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);  in mv_err_intr()
2000 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_process_crpb_entries()  local
2007 	in_index = (readl(port_mmio + EDMA_RSP_Q_IN_PTR_OFS)  in mv_process_crpb_entries()
2032 			 port_mmio + EDMA_RSP_Q_OUT_PTR_OFS);  in mv_process_crpb_entries()
2350 #define ZERO(reg) writel(0, port_mmio + (reg))
2354 	void __iomem *port_mmio = mv_port_base(mmio, port);  in mv5_reset_hc_port()  local
2359 	writel(0x11f, port_mmio + EDMA_CFG_OFS);  in mv5_reset_hc_port()
2370 	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS);  in mv5_reset_hc_port()
2512 	void __iomem *port_mmio;  in mv6_read_preamp()  local
2522 	port_mmio = mv_port_base(mmio, idx);  in mv6_read_preamp()
2523 	tmp = readl(port_mmio + PHY_MODE2);  in mv6_read_preamp()
2537 	void __iomem *port_mmio = mv_port_base(mmio, port);  in mv6_phy_errata()  local
2547 		m2 = readl(port_mmio + PHY_MODE2);  in mv6_phy_errata()
2550 		writel(m2, port_mmio + PHY_MODE2);  in mv6_phy_errata()
2554 		m2 = readl(port_mmio + PHY_MODE2);  in mv6_phy_errata()
2556 		writel(m2, port_mmio + PHY_MODE2);  in mv6_phy_errata()
2565 	m3 = readl(port_mmio + PHY_MODE3);  in mv6_phy_errata()
2573 		u32 m4 = readl(port_mmio + PHY_MODE4);  in mv6_phy_errata()
2583 		writel(m4, port_mmio + PHY_MODE4);  in mv6_phy_errata()
2590 	writel(m3, port_mmio + PHY_MODE3);  in mv6_phy_errata()
2593 	m2 = readl(port_mmio + PHY_MODE2);  in mv6_phy_errata()
2606 	writel(m2, port_mmio + PHY_MODE2);  in mv6_phy_errata()
2620 	void __iomem *port_mmio;  in mv_soc_read_preamp()  local
2623 	port_mmio = mv_port_base(mmio, idx);  in mv_soc_read_preamp()
2624 	tmp = readl(port_mmio + PHY_MODE2);  in mv_soc_read_preamp()
2631 #define ZERO(reg) writel(0, port_mmio + (reg))
2635 	void __iomem *port_mmio = mv_port_base(mmio, port);  in mv_soc_reset_hc_port()  local
2640 	writel(0x101f, port_mmio + EDMA_CFG_OFS);  in mv_soc_reset_hc_port()
2651 	writel(0xbc, port_mmio + EDMA_IORDY_TMOUT_OFS);  in mv_soc_reset_hc_port()
2694 static void mv_setup_ifcfg(void __iomem *port_mmio, int want_gen2i)  in mv_setup_ifcfg()  argument
2696 	u32 ifcfg = readl(port_mmio + SATA_INTERFACE_CFG_OFS);  in mv_setup_ifcfg()
2701 	writelfl(ifcfg, port_mmio + SATA_INTERFACE_CFG_OFS);  in mv_setup_ifcfg()
2707 	void __iomem *port_mmio = mv_port_base(mmio, port_no);  in mv_reset_channel()  local
2714 	mv_stop_edma_engine(port_mmio);  in mv_reset_channel()
2715 	writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS);  in mv_reset_channel()
2719 		mv_setup_ifcfg(port_mmio, 1);  in mv_reset_channel()
2726 	writelfl(EDMA_RESET, port_mmio + EDMA_CMD_OFS);  in mv_reset_channel()
2728 	writelfl(0, port_mmio + EDMA_CMD_OFS);  in mv_reset_channel()
2739 		void __iomem *port_mmio = mv_ap_base(ap);  in mv_pmp_select()  local
2740 		u32 reg = readl(port_mmio + SATA_IFCTL_OFS);  in mv_pmp_select()
2745 			writelfl(reg, port_mmio + SATA_IFCTL_OFS);  in mv_pmp_select()
2812 	void __iomem *port_mmio = mv_ap_base(ap);  in mv_eh_thaw()  local
2816 	writel(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);  in mv_eh_thaw()
2837 static void mv_port_init(struct ata_ioports *port,  void __iomem *port_mmio)  in mv_port_init()  argument
2839 	void __iomem *shd_base = port_mmio + SHD_BLK_OFS;  in mv_port_init()
2862 	writelfl(readl(port_mmio + serr_ofs), port_mmio + serr_ofs);  in mv_port_init()
2863 	writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);  in mv_port_init()
2866 	writelfl(~EDMA_ERR_IRQ_TRANSIENT, port_mmio + EDMA_ERR_IRQ_MASK_OFS);  in mv_port_init()
2869 		readl(port_mmio + EDMA_CFG_OFS),  in mv_port_init()
2870 		readl(port_mmio + EDMA_ERR_IRQ_CAUSE_OFS),  in mv_port_init()
2871 		readl(port_mmio + EDMA_ERR_IRQ_MASK_OFS));  in mv_port_init()
3093 		void __iomem *port_mmio = mv_port_base(mmio, port);  in mv_init_host()  local
3095 		mv_port_init(&ap->ioaddr, port_mmio);  in mv_init_host()
3099 			unsigned int offset = port_mmio - mmio;  in mv_init_host()