Lines Matching refs:BIT15
561 #define MISCSTATUS_RXC_LATCHED BIT15
581 #define SICR_RXC_ACTIVE BIT15
583 #define SICR_RXC (BIT15+BIT14)
638 #define DICR_MASTER BIT15
1849 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()
4735 RegValue |= BIT15; in usc_set_sdlc_mode()
4737 RegValue |= BIT15 + BIT14; in usc_set_sdlc_mode()
4779 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break; in usc_set_sdlc_mode()
4780 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 + BIT13; break; in usc_set_sdlc_mode()
4781 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14; break; in usc_set_sdlc_mode()
4782 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14 + BIT13; break; in usc_set_sdlc_mode()
4854 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break; in usc_set_sdlc_mode()
4855 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 + BIT13; break; in usc_set_sdlc_mode()
4856 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14; break; in usc_set_sdlc_mode()
4857 case HDLC_ENCODING_DIFF_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14 + BIT13; break; in usc_set_sdlc_mode()
5087 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) & ~BIT14)); in usc_set_sdlc_mode()