Lines Matching refs:BIT4
424 #define SYNCD BIT4
425 #define FLGD BIT4
440 #define FRME BIT4
441 #define RBIT BIT4
2623 if (timerstatus0 & (BIT5 | BIT4)) in synclinkmp_interrupt()
2627 if (timerstatus1 & (BIT5 | BIT4)) in synclinkmp_interrupt()
4416 case 7: RegValue |= BIT4 + BIT2; break; in async_mode()
4418 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break; in async_mode()
4549 RegValue |= BIT4; in hdlc_mode()
4551 RegValue |= BIT4; in hdlc_mode()
4597 RegValue |= BIT4; in hdlc_mode()
5110 write_reg(info, IER2, (unsigned char)((info->port_num & 1) ? BIT6 : BIT4)); in irq_test()
5213 lcr1_brdr_value &= ~(BIT5 + BIT4 + BIT3); in init_adapter()
5218 lcr1_brdr_value |= BIT5 + BIT4 + BIT3; in init_adapter()
5221 lcr1_brdr_value |= BIT5 + BIT4; in init_adapter()