Lines Matching refs:dd
84 static int create_port0_egr(struct ipath_devdata *dd) in create_port0_egr() argument
90 egrcnt = dd->ipath_p0_rcvegrcnt; in create_port0_egr()
92 skbinfo = vmalloc(sizeof(*dd->ipath_port0_skbinfo) * egrcnt); in create_port0_egr()
94 ipath_dev_err(dd, "allocation error for eager TID " in create_port0_egr()
108 skbinfo[e].skb = ipath_alloc_skb(dd, GFP_KERNEL); in create_port0_egr()
110 ipath_dev_err(dd, "SKB allocation error for " in create_port0_egr()
123 dd->ipath_port0_skbinfo = skbinfo; in create_port0_egr()
126 dd->ipath_port0_skbinfo[e].phys = in create_port0_egr()
127 ipath_map_single(dd->pcidev, in create_port0_egr()
128 dd->ipath_port0_skbinfo[e].skb->data, in create_port0_egr()
129 dd->ipath_ibmaxlen, PCI_DMA_FROMDEVICE); in create_port0_egr()
130 dd->ipath_f_put_tid(dd, e + (u64 __iomem *) in create_port0_egr()
131 ((char __iomem *) dd->ipath_kregbase + in create_port0_egr()
132 dd->ipath_rcvegrbase), in create_port0_egr()
134 dd->ipath_port0_skbinfo[e].phys); in create_port0_egr()
143 static int bringup_link(struct ipath_devdata *dd) in bringup_link() argument
149 dd->ipath_control &= ~INFINIPATH_C_LINKENABLE; in bringup_link()
150 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, in bringup_link()
151 dd->ipath_control); in bringup_link()
157 val = (dd->ipath_ibmaxlen >> 2) + 1; in bringup_link()
158 ibc = val << dd->ibcc_mpl_shift; in bringup_link()
175 dd->ipath_ibcctrl = ibc; in bringup_link()
185 dd->ipath_flags |= IPATH_IB_LINK_DISABLED; in bringup_link()
188 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl, ibc); in bringup_link()
191 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); in bringup_link()
193 ret = dd->ipath_f_bringup_serdes(dd); in bringup_link()
196 dev_info(&dd->pcidev->dev, "Could not initialize SerDes, " in bringup_link()
200 dd->ipath_control |= INFINIPATH_C_LINKENABLE; in bringup_link()
201 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, in bringup_link()
202 dd->ipath_control); in bringup_link()
208 static struct ipath_portdata *create_portdata0(struct ipath_devdata *dd) in create_portdata0() argument
214 pd->port_dd = dd; in create_portdata0()
223 static int init_chip_first(struct ipath_devdata *dd) in init_chip_first() argument
229 spin_lock_init(&dd->ipath_kernel_tid_lock); in init_chip_first()
230 spin_lock_init(&dd->ipath_user_tid_lock); in init_chip_first()
231 spin_lock_init(&dd->ipath_sendctrl_lock); in init_chip_first()
232 spin_lock_init(&dd->ipath_uctxt_lock); in init_chip_first()
233 spin_lock_init(&dd->ipath_sdma_lock); in init_chip_first()
234 spin_lock_init(&dd->ipath_gpio_lock); in init_chip_first()
235 spin_lock_init(&dd->ipath_eep_st_lock); in init_chip_first()
236 spin_lock_init(&dd->ipath_sdepb_lock); in init_chip_first()
237 mutex_init(&dd->ipath_eep_lock); in init_chip_first()
245 dd->ipath_f_config_ports(dd, ipath_cfgports); in init_chip_first()
247 dd->ipath_cfgports = dd->ipath_portcnt; in init_chip_first()
248 else if (ipath_cfgports <= dd->ipath_portcnt) { in init_chip_first()
249 dd->ipath_cfgports = ipath_cfgports; in init_chip_first()
251 dd->ipath_cfgports, ipath_read_kreg32(dd, in init_chip_first()
252 dd->ipath_kregs->kr_portcnt)); in init_chip_first()
254 dd->ipath_cfgports = dd->ipath_portcnt; in init_chip_first()
257 ipath_read_kreg32(dd, in init_chip_first()
258 dd->ipath_kregs->kr_portcnt)); in init_chip_first()
264 dd->ipath_pd = kzalloc(sizeof(*dd->ipath_pd) * dd->ipath_portcnt, in init_chip_first()
267 if (!dd->ipath_pd) { in init_chip_first()
268 ipath_dev_err(dd, "Unable to allocate portdata array, " in init_chip_first()
274 pd = create_portdata0(dd); in init_chip_first()
276 ipath_dev_err(dd, "Unable to allocate portdata for port " in init_chip_first()
281 dd->ipath_pd[0] = pd; in init_chip_first()
283 dd->ipath_rcvtidcnt = in init_chip_first()
284 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt); in init_chip_first()
285 dd->ipath_rcvtidbase = in init_chip_first()
286 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase); in init_chip_first()
287 dd->ipath_rcvegrcnt = in init_chip_first()
288 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt); in init_chip_first()
289 dd->ipath_rcvegrbase = in init_chip_first()
290 ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase); in init_chip_first()
291 dd->ipath_palign = in init_chip_first()
292 ipath_read_kreg32(dd, dd->ipath_kregs->kr_pagealign); in init_chip_first()
293 dd->ipath_piobufbase = in init_chip_first()
294 ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufbase); in init_chip_first()
295 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiosize); in init_chip_first()
296 dd->ipath_piosize2k = val & ~0U; in init_chip_first()
297 dd->ipath_piosize4k = val >> 32; in init_chip_first()
298 if (dd->ipath_piosize4k == 0 && ipath_mtu4096) in init_chip_first()
300 dd->ipath_ibmtu = ipath_mtu4096 ? 4096 : 2048; in init_chip_first()
301 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpiobufcnt); in init_chip_first()
302 dd->ipath_piobcnt2k = val & ~0U; in init_chip_first()
303 dd->ipath_piobcnt4k = val >> 32; in init_chip_first()
304 dd->ipath_pio2kbase = in init_chip_first()
305 (u32 __iomem *) (((char __iomem *) dd->ipath_kregbase) + in init_chip_first()
306 (dd->ipath_piobufbase & 0xffffffff)); in init_chip_first()
307 if (dd->ipath_piobcnt4k) { in init_chip_first()
308 dd->ipath_pio4kbase = (u32 __iomem *) in init_chip_first()
309 (((char __iomem *) dd->ipath_kregbase) + in init_chip_first()
310 (dd->ipath_piobufbase >> 32)); in init_chip_first()
316 dd->ipath_4kalign = ALIGN(dd->ipath_piosize4k, in init_chip_first()
317 dd->ipath_palign); in init_chip_first()
320 dd->ipath_piobcnt2k, dd->ipath_piosize2k, in init_chip_first()
321 dd->ipath_pio2kbase, dd->ipath_piobcnt4k, in init_chip_first()
322 dd->ipath_piosize4k, dd->ipath_pio4kbase, in init_chip_first()
323 dd->ipath_4kalign); in init_chip_first()
326 dd->ipath_piobcnt2k, dd->ipath_pio2kbase); in init_chip_first()
340 static int init_chip_reset(struct ipath_devdata *dd) in init_chip_reset() argument
350 dd->ipath_rcvctrl &= ~(1ULL << dd->ipath_r_tailupd_shift); in init_chip_reset()
351 for (i = 0; i < dd->ipath_portcnt; i++) { in init_chip_reset()
352 clear_bit(dd->ipath_r_portenable_shift + i, in init_chip_reset()
353 &dd->ipath_rcvctrl); in init_chip_reset()
354 clear_bit(dd->ipath_r_intravail_shift + i, in init_chip_reset()
355 &dd->ipath_rcvctrl); in init_chip_reset()
357 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, in init_chip_reset()
358 dd->ipath_rcvctrl); in init_chip_reset()
360 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); in init_chip_reset()
361 dd->ipath_sendctrl = 0U; /* no sdma, etc */ in init_chip_reset()
362 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl); in init_chip_reset()
363 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); in init_chip_reset()
364 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); in init_chip_reset()
366 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL); in init_chip_reset()
368 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidcnt); in init_chip_reset()
369 if (rtmp != dd->ipath_rcvtidcnt) in init_chip_reset()
370 dev_info(&dd->pcidev->dev, "tidcnt was %u before " in init_chip_reset()
372 dd->ipath_rcvtidcnt, rtmp); in init_chip_reset()
373 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvtidbase); in init_chip_reset()
374 if (rtmp != dd->ipath_rcvtidbase) in init_chip_reset()
375 dev_info(&dd->pcidev->dev, "tidbase was %u before " in init_chip_reset()
377 dd->ipath_rcvtidbase, rtmp); in init_chip_reset()
378 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrcnt); in init_chip_reset()
379 if (rtmp != dd->ipath_rcvegrcnt) in init_chip_reset()
380 dev_info(&dd->pcidev->dev, "egrcnt was %u before " in init_chip_reset()
382 dd->ipath_rcvegrcnt, rtmp); in init_chip_reset()
383 rtmp = ipath_read_kreg32(dd, dd->ipath_kregs->kr_rcvegrbase); in init_chip_reset()
384 if (rtmp != dd->ipath_rcvegrbase) in init_chip_reset()
385 dev_info(&dd->pcidev->dev, "egrbase was %u before " in init_chip_reset()
387 dd->ipath_rcvegrbase, rtmp); in init_chip_reset()
392 static int init_pioavailregs(struct ipath_devdata *dd) in init_pioavailregs() argument
396 dd->ipath_pioavailregs_dma = dma_alloc_coherent( in init_pioavailregs()
397 &dd->pcidev->dev, PAGE_SIZE, &dd->ipath_pioavailregs_phys, in init_pioavailregs()
399 if (!dd->ipath_pioavailregs_dma) { in init_pioavailregs()
400 ipath_dev_err(dd, "failed to allocate PIOavail reg area " in init_pioavailregs()
410 dd->ipath_statusp = (u64 *) in init_pioavailregs()
411 ((char *)dd->ipath_pioavailregs_dma + in init_pioavailregs()
413 dd->ipath_pioavregs * sizeof(u64)) & ~L1_CACHE_BYTES)); in init_pioavailregs()
415 *dd->ipath_statusp = dd->_ipath_status; in init_pioavailregs()
420 dd->ipath_freezemsg = (char *)&dd->ipath_statusp[1]; in init_pioavailregs()
422 dd->ipath_freezelen = L1_CACHE_BYTES - sizeof(dd->ipath_statusp[0]); in init_pioavailregs()
439 static void init_shadow_tids(struct ipath_devdata *dd) in init_shadow_tids() argument
444 pages = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * in init_shadow_tids()
447 ipath_dev_err(dd, "failed to allocate shadow page * " in init_shadow_tids()
449 dd->ipath_pageshadow = NULL; in init_shadow_tids()
453 addrs = vmalloc(dd->ipath_cfgports * dd->ipath_rcvtidcnt * in init_shadow_tids()
456 ipath_dev_err(dd, "failed to allocate shadow dma handle " in init_shadow_tids()
458 vfree(dd->ipath_pageshadow); in init_shadow_tids()
459 dd->ipath_pageshadow = NULL; in init_shadow_tids()
463 memset(pages, 0, dd->ipath_cfgports * dd->ipath_rcvtidcnt * in init_shadow_tids()
466 dd->ipath_pageshadow = pages; in init_shadow_tids()
467 dd->ipath_physshadow = addrs; in init_shadow_tids()
470 static void enable_chip(struct ipath_devdata *dd, int reinit) in enable_chip() argument
480 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, in enable_chip()
481 dd->ipath_rcvctrl); in enable_chip()
483 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags); in enable_chip()
485 dd->ipath_sendctrl = INFINIPATH_S_PIOENABLE | in enable_chip()
492 if (dd->ipath_pioupd_thresh) in enable_chip()
493 dd->ipath_sendctrl |= dd->ipath_pioupd_thresh in enable_chip()
495 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl); in enable_chip()
496 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch); in enable_chip()
497 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags); in enable_chip()
504 dd->ipath_rcvctrl |= (rcvmask << dd->ipath_r_portenable_shift) | in enable_chip()
505 (rcvmask << dd->ipath_r_intravail_shift); in enable_chip()
506 if (!(dd->ipath_flags & IPATH_NODMA_RTAIL)) in enable_chip()
507 dd->ipath_rcvctrl |= (1ULL << dd->ipath_r_tailupd_shift); in enable_chip()
509 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl, in enable_chip()
510 dd->ipath_rcvctrl); in enable_chip()
516 dd->ipath_flags |= IPATH_INITTED; in enable_chip()
522 val = ipath_read_ureg32(dd, ur_rcvegrindextail, 0); in enable_chip()
523 ipath_write_ureg(dd, ur_rcvegrindexhead, val, 0); in enable_chip()
526 ipath_write_ureg(dd, ur_rcvhdrhead, in enable_chip()
527 dd->ipath_rhdrhead_intr_off | in enable_chip()
528 dd->ipath_pd[0]->port_head, 0); in enable_chip()
536 for (i = 0; i < dd->ipath_pioavregs; i++) { in enable_chip()
542 if (i > 3 && (dd->ipath_flags & IPATH_SWAP_PIOBUFS)) in enable_chip()
543 pioavail = dd->ipath_pioavailregs_dma[i ^ 1]; in enable_chip()
545 pioavail = dd->ipath_pioavailregs_dma[i]; in enable_chip()
551 dd->ipath_pioavailshadow[i] = le64_to_cpu(pioavail); in enable_chip()
554 dd->ipath_flags |= IPATH_PRESENT; in enable_chip()
557 static int init_housekeeping(struct ipath_devdata *dd, int reinit) in init_housekeeping() argument
567 dd->ipath_rcvhdrsize = 0; in init_housekeeping()
577 dd->ipath_flags |= IPATH_LINKUNK | IPATH_PRESENT; in init_housekeeping()
578 dd->ipath_flags &= ~(IPATH_LINKACTIVE | IPATH_LINKARMED | in init_housekeeping()
582 dd->ipath_revision = in init_housekeeping()
583 ipath_read_kreg64(dd, dd->ipath_kregs->kr_revision); in init_housekeeping()
590 dd->ipath_sregbase = in init_housekeeping()
591 ipath_read_kreg32(dd, dd->ipath_kregs->kr_sendregbase); in init_housekeeping()
592 dd->ipath_cregbase = in init_housekeeping()
593 ipath_read_kreg32(dd, dd->ipath_kregs->kr_counterregbase); in init_housekeeping()
594 dd->ipath_uregbase = in init_housekeeping()
595 ipath_read_kreg32(dd, dd->ipath_kregs->kr_userregbase); in init_housekeeping()
597 "cntrbase %x\n", dd->ipath_kregbase, dd->ipath_sregbase, in init_housekeeping()
598 dd->ipath_uregbase, dd->ipath_cregbase); in init_housekeeping()
599 if ((dd->ipath_revision & 0xffffffff) == 0xffffffff in init_housekeeping()
600 || (dd->ipath_sregbase & 0xffffffff) == 0xffffffff in init_housekeeping()
601 || (dd->ipath_cregbase & 0xffffffff) == 0xffffffff in init_housekeeping()
602 || (dd->ipath_uregbase & 0xffffffff) == 0xffffffff) { in init_housekeeping()
603 ipath_dev_err(dd, "Register read failures from chip, " in init_housekeeping()
605 dd->ipath_flags &= ~IPATH_PRESENT; in init_housekeeping()
612 ipath_write_kreg (dd, dd->ipath_kregs->kr_hwdiagctrl, 0); in init_housekeeping()
615 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, in init_housekeeping()
619 (unsigned long long) dd->ipath_revision, in init_housekeeping()
620 dd->ipath_pcirev); in init_housekeeping()
622 if (((dd->ipath_revision >> INFINIPATH_R_SOFTWARE_SHIFT) & in init_housekeeping()
624 ipath_dev_err(dd, "Driver only handles version %d, " in init_housekeeping()
627 (int)(dd->ipath_revision >> in init_housekeeping()
630 (unsigned long long) dd->ipath_revision); in init_housekeeping()
634 dd->ipath_majrev = (u8) ((dd->ipath_revision >> in init_housekeeping()
637 dd->ipath_minrev = (u8) ((dd->ipath_revision >> in init_housekeeping()
640 dd->ipath_boardrev = (u8) ((dd->ipath_revision >> in init_housekeeping()
644 ret = dd->ipath_f_get_boardname(dd, boardn, sizeof boardn); in init_housekeeping()
646 snprintf(dd->ipath_boardversion, sizeof(dd->ipath_boardversion), in init_housekeeping()
650 (unsigned)(dd->ipath_revision >> INFINIPATH_R_ARCH_SHIFT) & in init_housekeeping()
652 dd->ipath_majrev, dd->ipath_minrev, dd->ipath_pcirev, in init_housekeeping()
653 (unsigned)(dd->ipath_revision >> in init_housekeeping()
657 ipath_dbg("%s", dd->ipath_boardversion); in init_housekeeping()
663 ret = init_chip_reset(dd); in init_housekeeping()
665 ret = init_chip_first(dd); in init_housekeeping()
673 struct ipath_devdata *dd = (struct ipath_devdata *) opaque; in verify_interrupt() local
675 if (!dd) in verify_interrupt()
682 if (dd->ipath_int_counter == 0) { in verify_interrupt()
683 if (!dd->ipath_f_intr_fallback(dd)) in verify_interrupt()
684 dev_err(&dd->pcidev->dev, "No interrupts detected, " in verify_interrupt()
687 mod_timer(&dd->ipath_intrchk_timer, jiffies + HZ/2); in verify_interrupt()
690 dd->ipath_int_counter); in verify_interrupt()
708 int ipath_init_chip(struct ipath_devdata *dd, int reinit) in ipath_init_chip() argument
717 ret = init_housekeeping(dd, reinit); in ipath_init_chip()
737 dd->ipath_rcvhdrcnt = max(dd->ipath_p0_rcvegrcnt, dd->ipath_rcvegrcnt); in ipath_init_chip()
738 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrcnt, in ipath_init_chip()
739 dd->ipath_rcvhdrcnt); in ipath_init_chip()
747 piobufs = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k; in ipath_init_chip()
752 dd->ipath_pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2) in ipath_init_chip()
754 uports = dd->ipath_cfgports ? dd->ipath_cfgports - 1 : 0; in ipath_init_chip()
756 defkbufs = 32 + dd->ipath_pioreserved; in ipath_init_chip()
758 defkbufs = 16 + dd->ipath_pioreserved; in ipath_init_chip()
766 dev_info(&dd->pcidev->dev, "Allocating %d PIO bufs of " in ipath_init_chip()
779 dd->ipath_lastport_piobuf = piobufs - kpiobufs; in ipath_init_chip()
780 dd->ipath_pbufsport = in ipath_init_chip()
781 uports ? dd->ipath_lastport_piobuf / uports : 0; in ipath_init_chip()
783 dd->ipath_ports_extrabuf = dd->ipath_lastport_piobuf - in ipath_init_chip()
784 (dd->ipath_pbufsport * uports); in ipath_init_chip()
785 if (dd->ipath_ports_extrabuf) in ipath_init_chip()
787 "ports <= %u\n", dd->ipath_pbufsport, in ipath_init_chip()
788 dd->ipath_ports_extrabuf); in ipath_init_chip()
789 dd->ipath_lastpioindex = 0; in ipath_init_chip()
790 dd->ipath_lastpioindexl = dd->ipath_piobcnt2k; in ipath_init_chip()
794 piobufs, dd->ipath_pbufsport, uports); in ipath_init_chip()
795 ret = dd->ipath_f_early_init(dd); in ipath_init_chip()
797 ipath_dev_err(dd, "Early initialization failure\n"); in ipath_init_chip()
805 dd->ipath_hdrqlast = in ipath_init_chip()
806 dd->ipath_rcvhdrentsize * (dd->ipath_rcvhdrcnt - 1); in ipath_init_chip()
807 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrentsize, in ipath_init_chip()
808 dd->ipath_rcvhdrentsize); in ipath_init_chip()
809 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize, in ipath_init_chip()
810 dd->ipath_rcvhdrsize); in ipath_init_chip()
813 ret = init_pioavailregs(dd); in ipath_init_chip()
814 init_shadow_tids(dd); in ipath_init_chip()
819 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendpioavailaddr, in ipath_init_chip()
820 dd->ipath_pioavailregs_phys); in ipath_init_chip()
826 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_sendpioavailaddr); in ipath_init_chip()
827 if (val != dd->ipath_pioavailregs_phys) { in ipath_init_chip()
828 ipath_dev_err(dd, "Catastrophic software error, " in ipath_init_chip()
831 (unsigned long) dd->ipath_pioavailregs_phys, in ipath_init_chip()
837 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvbthqp, IPATH_KD_QP); in ipath_init_chip()
843 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, 0ULL); in ipath_init_chip()
844 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, in ipath_init_chip()
846 ipath_write_kreg(dd, dd->ipath_kregs->kr_control, 0ULL); in ipath_init_chip()
852 if (bringup_link(dd)) { in ipath_init_chip()
853 dev_info(&dd->pcidev->dev, "Failed to bringup IB link\n"); in ipath_init_chip()
863 dd->ipath_f_init_hwerrors(dd); in ipath_init_chip()
864 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, in ipath_init_chip()
866 ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrmask, in ipath_init_chip()
867 dd->ipath_hwerrmask); in ipath_init_chip()
870 ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL); in ipath_init_chip()
872 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, in ipath_init_chip()
873 ~dd->ipath_maskederrs); in ipath_init_chip()
874 dd->ipath_maskederrs = 0; /* don't re-enable ignored in timer */ in ipath_init_chip()
875 dd->ipath_errormask = in ipath_init_chip()
876 ipath_read_kreg64(dd, dd->ipath_kregs->kr_errormask); in ipath_init_chip()
878 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL); in ipath_init_chip()
880 dd->ipath_f_tidtemplate(dd); in ipath_init_chip()
888 pd = dd->ipath_pd[0]; in ipath_init_chip()
897 npd = create_portdata0(dd); in ipath_init_chip()
899 ipath_free_pddata(dd, pd); in ipath_init_chip()
900 dd->ipath_pd[0] = npd; in ipath_init_chip()
903 ipath_dev_err(dd, "Unable to allocate portdata" in ipath_init_chip()
909 ret = ipath_create_rcvhdrq(dd, pd); in ipath_init_chip()
911 ret = create_port0_egr(dd); in ipath_init_chip()
913 ipath_dev_err(dd, "failed to allocate kernel port's " in ipath_init_chip()
918 enable_chip(dd, reinit); in ipath_init_chip()
921 ipath_chg_pioavailkernel(dd, 0, piobufs, 1); in ipath_init_chip()
931 ipath_cancel_sends(dd, 1); in ipath_init_chip()
938 dd->ipath_dummy_hdrq = dma_alloc_coherent( in ipath_init_chip()
939 &dd->pcidev->dev, dd->ipath_pd[0]->port_rcvhdrq_size, in ipath_init_chip()
940 &dd->ipath_dummy_hdrq_phys, in ipath_init_chip()
942 if (!dd->ipath_dummy_hdrq) { in ipath_init_chip()
943 dev_info(&dd->pcidev->dev, in ipath_init_chip()
945 dd->ipath_pd[0]->port_rcvhdrq_size); in ipath_init_chip()
947 dd->ipath_dummy_hdrq_phys = 0UL; in ipath_init_chip()
955 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL); in ipath_init_chip()
957 if (!dd->ipath_stats_timer_active) { in ipath_init_chip()
963 init_timer(&dd->ipath_stats_timer); in ipath_init_chip()
964 dd->ipath_stats_timer.function = ipath_get_faststats; in ipath_init_chip()
965 dd->ipath_stats_timer.data = (unsigned long) dd; in ipath_init_chip()
967 dd->ipath_stats_timer.expires = jiffies + 5 * HZ; in ipath_init_chip()
969 add_timer(&dd->ipath_stats_timer); in ipath_init_chip()
970 dd->ipath_stats_timer_active = 1; in ipath_init_chip()
974 if (dd->ipath_flags & IPATH_HAS_SEND_DMA) in ipath_init_chip()
975 ret = setup_sdma(dd); in ipath_init_chip()
978 init_timer(&dd->ipath_hol_timer); in ipath_init_chip()
979 dd->ipath_hol_timer.function = ipath_hol_event; in ipath_init_chip()
980 dd->ipath_hol_timer.data = (unsigned long)dd; in ipath_init_chip()
981 dd->ipath_hol_state = IPATH_HOL_UP; in ipath_init_chip()
985 *dd->ipath_statusp |= IPATH_STATUS_CHIP_PRESENT; in ipath_init_chip()
986 if (!dd->ipath_f_intrsetup(dd)) { in ipath_init_chip()
988 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, in ipath_init_chip()
991 ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, in ipath_init_chip()
994 *dd->ipath_statusp |= IPATH_STATUS_INITTED; in ipath_init_chip()
1001 init_timer(&dd->ipath_intrchk_timer); in ipath_init_chip()
1002 dd->ipath_intrchk_timer.function = in ipath_init_chip()
1004 dd->ipath_intrchk_timer.data = in ipath_init_chip()
1005 (unsigned long) dd; in ipath_init_chip()
1007 dd->ipath_intrchk_timer.expires = jiffies + HZ/2; in ipath_init_chip()
1008 add_timer(&dd->ipath_intrchk_timer); in ipath_init_chip()
1010 ipath_dev_err(dd, "No interrupts enabled, couldn't " in ipath_init_chip()
1013 if (dd->ipath_cfgports > ipath_stats.sps_nports) in ipath_init_chip()
1022 ipath_stats.sps_nports = dd->ipath_cfgports; in ipath_init_chip()
1033 struct ipath_devdata *dd; in ipath_set_kpiobufs() local
1050 list_for_each_entry(dd, &ipath_dev_list, ipath_list) { in ipath_set_kpiobufs()
1051 if (dd->ipath_kregbase) in ipath_set_kpiobufs()
1053 if (val > (dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - in ipath_set_kpiobufs()
1054 (dd->ipath_cfgports * in ipath_set_kpiobufs()
1058 dd, in ipath_set_kpiobufs()
1061 val, dd->ipath_cfgports - 1, in ipath_set_kpiobufs()
1066 dd->ipath_lastport_piobuf = in ipath_set_kpiobufs()
1067 dd->ipath_piobcnt2k + dd->ipath_piobcnt4k - val; in ipath_set_kpiobufs()