125 		if (e->opcode == OP(RDMA_READ_REQUEST)) {  in ipath_make_rc_ack()
310 		switch (wqe->wr.opcode) {  in ipath_make_rc_req()
326 			if (wqe->wr.opcode == IB_WR_SEND)  in ipath_make_rc_req()
365 			if (wqe->wr.opcode == IB_WR_RDMA_WRITE)  in ipath_make_rc_req()
433 			if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {  in ipath_make_rc_req()
471 		if (wqe->wr.opcode == IB_WR_RDMA_READ)  in ipath_make_rc_req()
510 		if (wqe->wr.opcode == IB_WR_SEND)  in ipath_make_rc_req()
546 		if (wqe->wr.opcode == IB_WR_RDMA_WRITE)  in ipath_make_rc_req()
728 	u32 opcode;  in reset_psn()  local
742 	opcode = wqe->wr.opcode;  in reset_psn()
763 		opcode = wqe->wr.opcode;  in reset_psn()
771 	switch (opcode) {  in reset_psn()
829 	if (wqe->wr.opcode == IB_WR_RDMA_READ)  in ipath_restart_rc()
857 static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,  in do_rc_ack()  argument
901 		if (wqe->wr.opcode == IB_WR_RDMA_READ &&  in do_rc_ack()
902 		    opcode == OP(RDMA_READ_RESPONSE_ONLY) &&  in do_rc_ack()
916 		if ((wqe->wr.opcode == IB_WR_RDMA_READ &&  in do_rc_ack()
917 		     (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||  in do_rc_ack()
918 		    ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||  in do_rc_ack()
919 		      wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&  in do_rc_ack()
920 		     (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {  in do_rc_ack()
934 		if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||  in do_rc_ack()
935 		    wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)  in do_rc_ack()
938 		    (wqe->wr.opcode == IB_WR_RDMA_READ ||  in do_rc_ack()
939 		     wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||  in do_rc_ack()
940 		     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {  in do_rc_ack()
954 			wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];  in do_rc_ack()
1032 		if (wqe->wr.opcode == IB_WR_RDMA_READ)  in do_rc_ack()
1121 				     u32 opcode,  in ipath_rc_rcv_resp()  argument
1147 		if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {  in ipath_rc_rcv_resp()
1165 	switch (opcode) {  in ipath_rc_rcv_resp()
1175 		if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {  in ipath_rc_rcv_resp()
1185 		if (!do_rc_ack(qp, aeth, psn, opcode, val) ||  in ipath_rc_rcv_resp()
1186 		    opcode != OP(RDMA_READ_RESPONSE_FIRST))  in ipath_rc_rcv_resp()
1190 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))  in ipath_rc_rcv_resp()
1212 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))  in ipath_rc_rcv_resp()
1227 		if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))  in ipath_rc_rcv_resp()
1245 		if (!do_rc_ack(qp, aeth, psn, opcode, 0))  in ipath_rc_rcv_resp()
1276 		if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))  in ipath_rc_rcv_resp()
1339 				     u32 opcode,  in ipath_rc_rcv_error()  argument
1399 		if (!e->opcode) {  in ipath_rc_rcv_error()
1409 	switch (opcode) {  in ipath_rc_rcv_error()
1420 		if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)  in ipath_rc_rcv_error()
1472 		if (!e || e->opcode != (u8) opcode || old_req)  in ipath_rc_rcv_error()
1574 	u32 opcode;  in ipath_rc_rcv()  local
1617 	opcode = be32_to_cpu(ohdr->bth[0]) >> 24;  in ipath_rc_rcv()
1618 	if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&  in ipath_rc_rcv()
1619 	    opcode <= OP(ATOMIC_ACKNOWLEDGE)) {  in ipath_rc_rcv()
1620 		ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,  in ipath_rc_rcv()
1628 		if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,  in ipath_rc_rcv()
1638 		if (opcode == OP(SEND_MIDDLE) ||  in ipath_rc_rcv()
1639 		    opcode == OP(SEND_LAST) ||  in ipath_rc_rcv()
1640 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE))  in ipath_rc_rcv()
1646 		if (opcode == OP(RDMA_WRITE_MIDDLE) ||  in ipath_rc_rcv()
1647 		    opcode == OP(RDMA_WRITE_LAST) ||  in ipath_rc_rcv()
1648 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))  in ipath_rc_rcv()
1653 		if (opcode == OP(SEND_MIDDLE) ||  in ipath_rc_rcv()
1654 		    opcode == OP(SEND_LAST) ||  in ipath_rc_rcv()
1655 		    opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||  in ipath_rc_rcv()
1656 		    opcode == OP(RDMA_WRITE_MIDDLE) ||  in ipath_rc_rcv()
1657 		    opcode == OP(RDMA_WRITE_LAST) ||  in ipath_rc_rcv()
1658 		    opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))  in ipath_rc_rcv()
1671 	switch (opcode) {  in ipath_rc_rcv()
1700 		if (opcode == OP(SEND_ONLY))  in ipath_rc_rcv()
1735 		if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||  in ipath_rc_rcv()
1736 		    opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))  in ipath_rc_rcv()
1737 			wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;  in ipath_rc_rcv()
1739 			wc.opcode = IB_WC_RECV;  in ipath_rc_rcv()
1785 		if (opcode == OP(RDMA_WRITE_FIRST))  in ipath_rc_rcv()
1787 		else if (opcode == OP(RDMA_WRITE_ONLY))  in ipath_rc_rcv()
1846 		e->opcode = opcode;  in ipath_rc_rcv()
1856 		qp->r_state = opcode;  in ipath_rc_rcv()
1909 		e->atomic_data = (opcode == OP(FETCH_ADD)) ?  in ipath_rc_rcv()
1914 		e->opcode = opcode;  in ipath_rc_rcv()
1919 		qp->r_state = opcode;  in ipath_rc_rcv()
1934 	qp->r_state = opcode;  in ipath_rc_rcv()