32 readreg(unsigned int ale, unsigned int adr, u_char off)  in readreg()  argument
37 	ret = bytein(adr);  in readreg()
42 readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)  in readfifo()  argument
45 	insb(adr, data, size);  in readfifo()
50 writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)  in writereg()  argument
53 	byteout(adr, data);  in writereg()
57 writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)  in writefifo()  argument
60 	outsb(adr, data, size);  in writefifo()
68 	return (readreg(cs->hw.mic.adr, cs->hw.mic.isac, offset));  in ReadISAC()
74 	writereg(cs->hw.mic.adr, cs->hw.mic.isac, offset, value);  in WriteISAC()
80 	readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);  in ReadISACfifo()
86 	writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);  in WriteISACfifo()
92 	return (readreg(cs->hw.mic.adr,  in ReadHSCX()
99 	writereg(cs->hw.mic.adr,  in WriteHSCX()
107 #define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \
109 #define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \
112 #define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \
115 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \
128 	val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);  in mic_interrupt()
132 	val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA);  in mic_interrupt()
136 	val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);  in mic_interrupt()
142 	val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA);  in mic_interrupt()
148 	writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0xFF);  in mic_interrupt()
149 	writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0xFF);  in mic_interrupt()
150 	writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0xFF);  in mic_interrupt()
151 	writereg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_MASK, 0x0);  in mic_interrupt()
152 	writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK, 0x0);  in mic_interrupt()
153 	writereg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0x0);  in mic_interrupt()
205 	cs->hw.mic.adr = cs->hw.mic.cfg_reg + MIC_ADR;  in setup_mic()