123 static void epu_dma_done(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_dma_done()  argument
132 	mb = &order->mb;  in epu_dma_done()
139 			  (order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) ?  in epu_dma_done()
145 	mdl_ack = order->mdl_ack;  in epu_dma_done()
169 		if ((order->flags & CX18_F_EWO_MB_STALE_UPON_RECEIPT) &&  in epu_dma_done()
205 static void epu_debug(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_debug()  argument
208 	char *str = order->str;  in epu_debug()
210 	CX18_DEBUG_INFO("%x %s\n", order->mb.args[0], str);  in epu_debug()
216 static void epu_cmd(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_cmd()  argument
218 	switch (order->rpu) {  in epu_cmd()
221 		switch (order->mb.cmd) {  in epu_cmd()
223 			epu_dma_done(cx, order);  in epu_cmd()
226 			epu_debug(cx, order);  in epu_cmd()
230 				  order->mb.cmd);  in epu_cmd()
237 			  order->mb.cmd);  in epu_cmd()
245 void free_epu_work_order(struct cx18 *cx, struct cx18_epu_work_order *order)  in free_epu_work_order()  argument
247 	atomic_set(&order->pending, 0);  in free_epu_work_order()
252 	struct cx18_epu_work_order *order =  in cx18_epu_work_handler()  local
254 	struct cx18 *cx = order->cx;  in cx18_epu_work_handler()
255 	epu_cmd(cx, order);  in cx18_epu_work_handler()
256 	free_epu_work_order(cx, order);  in cx18_epu_work_handler()
264 static void mb_ack_irq(struct cx18 *cx, struct cx18_epu_work_order *order)  in mb_ack_irq()  argument
269 	switch (order->rpu) {  in mb_ack_irq()
280 			  order->rpu, order->mb.cmd);  in mb_ack_irq()
284 	req = order->mb.request;  in mb_ack_irq()
291 				rpu_str[order->rpu], rpu_str[order->rpu], req);  in mb_ack_irq()
292 		order->flags |= CX18_F_EWO_MB_STALE_WHILE_PROC;  in mb_ack_irq()
300 static int epu_dma_done_irq(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_dma_done_irq()  argument
305 	mb = &order->mb;  in epu_dma_done_irq()
312 		if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
313 			mb_ack_irq(cx, order);  in epu_dma_done_irq()
317 	cx18_memcpy_fromio(cx, order->mdl_ack, cx->enc_mem + mdl_ack_offset,  in epu_dma_done_irq()
320 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_dma_done_irq()
321 		mb_ack_irq(cx, order);  in epu_dma_done_irq()
326 int epu_debug_irq(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_debug_irq()  argument
329 	char *str = order->str;  in epu_debug_irq()
332 	str_offset = order->mb.args[1];  in epu_debug_irq()
340 	if ((order->flags & CX18_F_EWO_MB_STALE) == 0)  in epu_debug_irq()
341 		mb_ack_irq(cx, order);  in epu_debug_irq()
347 int epu_cmd_irq(struct cx18 *cx, struct cx18_epu_work_order *order)  in epu_cmd_irq()  argument
351 	switch (order->rpu) {  in epu_cmd_irq()
354 		switch (order->mb.cmd) {  in epu_cmd_irq()
356 			ret = epu_dma_done_irq(cx, order);  in epu_cmd_irq()
359 			ret = epu_debug_irq(cx, order);  in epu_cmd_irq()
363 				  order->mb.cmd);  in epu_cmd_irq()
370 			  order->mb.cmd);  in epu_cmd_irq()
382 	struct cx18_epu_work_order *order = NULL;  in alloc_epu_work_order_irq()  local
394 			order = &cx->epu_work_order[i];  in alloc_epu_work_order_irq()
395 			atomic_set(&order->pending, 1);  in alloc_epu_work_order_irq()
399 	return order;  in alloc_epu_work_order_irq()
406 	struct cx18_epu_work_order *order;  in cx18_api_epu_cmd_irq()  local
420 	order = alloc_epu_work_order_irq(cx);  in cx18_api_epu_cmd_irq()
421 	if (order == NULL) {  in cx18_api_epu_cmd_irq()
427 	order->flags = 0;  in cx18_api_epu_cmd_irq()
428 	order->rpu = rpu;  in cx18_api_epu_cmd_irq()
429 	order_mb = &order->mb;  in cx18_api_epu_cmd_irq()
443 		order->flags = CX18_F_EWO_MB_STALE_UPON_RECEIPT;  in cx18_api_epu_cmd_irq()
450 	submit = epu_cmd_irq(cx, order);  in cx18_api_epu_cmd_irq()
452 		queue_work(cx->work_queue, &order->work);  in cx18_api_epu_cmd_irq()