Lines Matching refs:OP_WR_FPGA
120 {OP_WR_FPGA, TSDM_REG_TIMER_TICK, 0xa},
292 {OP_WR_FPGA, TSEM_REG_FAST_MEMORY + 0x18300, 0x1388},
552 {OP_WR_FPGA, CSDM_REG_TIMER_TICK, 0xa},
596 {OP_WR_FPGA, USDM_REG_TIMER_TICK, 0xa},
885 {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18300, 0x1388},
889 {OP_WR_FPGA, USEM_REG_FAST_MEMORY + 0x18380, 0x4c4b40},
1212 {OP_WR_FPGA, TM_REG_TIMER_TICK_SIZE, 0x9c4},
1276 {OP_WR_FPGA, XSDM_REG_TIMER_TICK, 0xa},
1821 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18300, 0x1388},
1825 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18340, 0x5},
1829 {OP_WR_FPGA, XSEM_REG_FAST_MEMORY + 0x18380, 0x4c4b40},