59 #define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE)  argument
63 #define V_MI1_MDI_INVERT(x) ((x) << S_MI1_MDI_INVERT)  argument
67 #define V_MI1_PREAMBLE_ENABLE(x) ((x) << S_MI1_PREAMBLE_ENABLE)  argument
72 #define V_MI1_SOF(x) ((x) << S_MI1_SOF)  argument
73 #define G_MI1_SOF(x) (((x) >> S_MI1_SOF) & M_MI1_SOF)  argument
77 #define V_MI1_CLK_DIV(x) ((x) << S_MI1_CLK_DIV)  argument
78 #define G_MI1_CLK_DIV(x) (((x) >> S_MI1_CLK_DIV) & M_MI1_CLK_DIV)  argument
84 #define V_MI1_REG_ADDR(x) ((x) << S_MI1_REG_ADDR)  argument
85 #define G_MI1_REG_ADDR(x) (((x) >> S_MI1_REG_ADDR) & M_MI1_REG_ADDR)  argument
89 #define V_MI1_PHY_ADDR(x) ((x) << S_MI1_PHY_ADDR)  argument
90 #define G_MI1_PHY_ADDR(x) (((x) >> S_MI1_PHY_ADDR) & M_MI1_PHY_ADDR)  argument
96 #define V_MI1_DATA(x) ((x) << S_MI1_DATA)  argument
97 #define G_MI1_DATA(x) (((x) >> S_MI1_DATA) & M_MI1_DATA)  argument
103 #define V_MI1_OP(x) ((x) << S_MI1_OP)  argument
104 #define G_MI1_OP(x) (((x) >> S_MI1_OP) & M_MI1_OP)  argument
107 #define V_MI1_ADDR_AUTOINC(x) ((x) << S_MI1_ADDR_AUTOINC)  argument
111 #define V_MI1_OP_BUSY(x) ((x) << S_MI1_OP_BUSY)  argument