104 	mace->eth.mac_addr = macaddr;  in load_eaddr()
111 	while ((___rval = mace->eth.phy_data) & MDIO_BUSY) {	\
119 	mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f);  in mdio_read()
121 	mace->eth.phy_trans_go = 1;  in mdio_read()
190 		mace->eth.mac_ctrl = priv->mac_ctrl;  in meth_check_link()
199 		mace->eth.mac_ctrl = priv->mac_ctrl;  in meth_check_link()
213 	mace->eth.tx_ring_base = priv->tx_ring_dma;  in meth_init_tx_ring()
234 		mace->eth.rx_fifo = priv->rx_ring_dmas[i];  in meth_init_rx_ring()
272 	mace->eth.mac_ctrl = SGI_MAC_RESET;  in meth_reset()
274 	mace->eth.mac_ctrl = 0;  in meth_reset()
291 	mace->eth.mac_ctrl = priv->mac_ctrl;  in meth_reset()
299 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_reset()
338 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_open()
362 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_release()
382 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_rx()
452 		mace->eth.rx_fifo = priv->rx_ring_dmas[priv->rx_write];  in meth_rx()
458 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_rx()
459 	mace->eth.int_stat = METH_INT_RX_THRESHOLD;  in meth_rx()
481 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_tx_cleanup()
529 	mace->eth.int_stat = METH_INT_TX_EMPTY | METH_INT_TX_PKT;  in meth_tx_cleanup()
551 		mace->eth.int_stat = METH_INT_RX_UNDERFLOW;  in meth_error()
556 		mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_error()
560 	mace->eth.int_stat = METH_INT_ERROR;  in meth_error()
572 	status = mace->eth.int_stat;  in meth_interrupt()
591 		status = mace->eth.int_stat;  in meth_interrupt()
685 	mace->eth.tx_info = priv->tx_write;  in meth_add_to_tx_ring()
700 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_tx()
713 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_tx()
746 	mace->eth.dma_ctrl = priv->dma_ctrl;  in meth_tx_timeout()
797 	dev->base_addr	     = (unsigned long)&mace->eth;  in meth_probe()
811 	       dev->name, (unsigned int)(mace->eth.mac_ctrl >> 29));  in meth_probe()