Lines Matching refs:ha
34 struct qla_hw_data *ha; in qla2100_intr_handler() local
49 ha = rsp->hw; in qla2100_intr_handler()
50 reg = &ha->iobase->isp; in qla2100_intr_handler()
53 spin_lock(&ha->hardware_lock); in qla2100_intr_handler()
58 if (pci_channel_offline(ha->pdev)) in qla2100_intr_handler()
69 ha->isp_ops->fw_dump(vha, 1); in qla2100_intr_handler()
80 mb[0] = RD_MAILBOX_REG(ha, reg, 0); in qla2100_intr_handler()
85 mb[1] = RD_MAILBOX_REG(ha, reg, 1); in qla2100_intr_handler()
86 mb[2] = RD_MAILBOX_REG(ha, reg, 2); in qla2100_intr_handler()
87 mb[3] = RD_MAILBOX_REG(ha, reg, 3); in qla2100_intr_handler()
105 spin_unlock(&ha->hardware_lock); in qla2100_intr_handler()
107 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && in qla2100_intr_handler()
108 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { in qla2100_intr_handler()
109 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2100_intr_handler()
110 complete(&ha->mbx_intr_comp); in qla2100_intr_handler()
136 struct qla_hw_data *ha; in qla2300_intr_handler() local
145 ha = rsp->hw; in qla2300_intr_handler()
146 reg = &ha->iobase->isp; in qla2300_intr_handler()
149 spin_lock(&ha->hardware_lock); in qla2300_intr_handler()
154 if (pci_channel_offline(ha->pdev)) in qla2300_intr_handler()
159 qla_printk(KERN_INFO, ha, "Parity error -- " in qla2300_intr_handler()
162 qla_printk(KERN_INFO, ha, "RISC paused -- " in qla2300_intr_handler()
173 ha->isp_ops->fw_dump(vha, 1); in qla2300_intr_handler()
192 mb[1] = RD_MAILBOX_REG(ha, reg, 1); in qla2300_intr_handler()
193 mb[2] = RD_MAILBOX_REG(ha, reg, 2); in qla2300_intr_handler()
194 mb[3] = RD_MAILBOX_REG(ha, reg, 3); in qla2300_intr_handler()
208 mb[2] = RD_MAILBOX_REG(ha, reg, 2); in qla2300_intr_handler()
220 spin_unlock(&ha->hardware_lock); in qla2300_intr_handler()
222 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && in qla2300_intr_handler()
223 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { in qla2300_intr_handler()
224 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2300_intr_handler()
225 complete(&ha->mbx_intr_comp); in qla2300_intr_handler()
241 struct qla_hw_data *ha = vha->hw; in qla2x00_mbx_completion() local
242 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_mbx_completion()
245 ha->flags.mbox_int = 1; in qla2x00_mbx_completion()
246 ha->mailbox_out[0] = mb0; in qla2x00_mbx_completion()
247 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); in qla2x00_mbx_completion()
249 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla2x00_mbx_completion()
250 if (IS_QLA2200(ha) && cnt == 8) in qla2x00_mbx_completion()
251 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); in qla2x00_mbx_completion()
253 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); in qla2x00_mbx_completion()
255 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); in qla2x00_mbx_completion()
260 if (ha->mcp) { in qla2x00_mbx_completion()
262 __func__, vha->host_no, ha->mcp->mb[0])); in qla2x00_mbx_completion()
317 struct qla_hw_data *ha = vha->hw; in qla2x00_async_event() local
318 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_async_event()
325 if (IS_QLA81XX(ha)) in qla2x00_async_event()
354 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); in qla2x00_async_event()
362 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); in qla2x00_async_event()
363 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); in qla2x00_async_event()
370 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | in qla2x00_async_event()
371 RD_MAILBOX_REG(ha, reg, 6)); in qla2x00_async_event()
397 qla_printk(KERN_INFO, ha, in qla2x00_async_event()
401 ha->isp_ops->fw_dump(vha, 1); in qla2x00_async_event()
403 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_async_event()
405 qla_printk(KERN_ERR, ha, in qla2x00_async_event()
412 qla_printk(KERN_INFO, ha, in qla2x00_async_event()
423 qla_printk(KERN_WARNING, ha, "ISP Request Transfer Error.\n"); in qla2x00_async_event()
431 qla_printk(KERN_WARNING, ha, "ISP Response Transfer Error.\n"); in qla2x00_async_event()
444 qla_printk(KERN_INFO, ha, "LIP occurred (%x).\n", mb[1]); in qla2x00_async_event()
465 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { in qla2x00_async_event()
467 ha->link_data_rate = PORT_SPEED_1GB; in qla2x00_async_event()
474 ha->link_data_rate = mb[1]; in qla2x00_async_event()
479 qla_printk(KERN_INFO, ha, "LOOP UP detected (%s Gbps).\n", in qla2x00_async_event()
483 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); in qla2x00_async_event()
489 qla_printk(KERN_INFO, ha, "LOOP DOWN detected (%x %x %x).\n", in qla2x00_async_event()
505 ha->link_data_rate = PORT_SPEED_UNKNOWN; in qla2x00_async_event()
512 qla_printk(KERN_INFO, ha, in qla2x00_async_event()
528 ha->operating_mode = LOOP; in qla2x00_async_event()
535 if (IS_QLA2100(ha)) in qla2x00_async_event()
538 if (IS_QLA81XX(ha)) in qla2x00_async_event()
568 ha->flags.gpsc_supported = 1; in qla2x00_async_event()
573 if (IS_QLA2100(ha)) in qla2x00_async_event()
579 qla_printk(KERN_INFO, ha, in qla2x00_async_event()
687 if (IS_FWI2_CAPABLE(ha)) in qla2x00_async_event()
707 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); in qla2x00_async_event()
710 qla_printk(KERN_INFO, ha, "Alert 84XX: panic recovery " in qla2x00_async_event()
714 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; in qla2x00_async_event()
715 DEBUG2(qla_printk(KERN_INFO, ha, "Alert 84XX:" in qla2x00_async_event()
716 "firmware version %x\n", ha->cs84xx->op_fw_version)); in qla2x00_async_event()
719 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; in qla2x00_async_event()
720 DEBUG2(qla_printk(KERN_INFO, ha, "Alert 84XX:" in qla2x00_async_event()
722 ha->cs84xx->diag_fw_version)); in qla2x00_async_event()
725 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; in qla2x00_async_event()
726 ha->cs84xx->fw_update = 1; in qla2x00_async_event()
727 DEBUG2(qla_printk(KERN_INFO, ha, "Alert 84XX: gold " in qla2x00_async_event()
729 ha->cs84xx->gold_fw_version)); in qla2x00_async_event()
732 qla_printk(KERN_ERR, ha, in qla2x00_async_event()
736 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); in qla2x00_async_event()
757 if (!vha->vp_idx && ha->num_vhosts) in qla2x00_async_event()
766 struct qla_hw_data *ha = vha->hw; in qla2x00_adjust_sdev_qdepth_up() local
769 req = ha->req_q_map[vha->req_ques[0]]; in qla2x00_adjust_sdev_qdepth_up()
784 DEBUG2(qla_printk(KERN_INFO, ha, in qla2x00_adjust_sdev_qdepth_up()
837 struct qla_hw_data *ha = vha->hw; in qla2x00_process_completed_request() local
843 qla_printk(KERN_WARNING, ha, in qla2x00_process_completed_request()
862 qla2x00_sp_compl(ha, sp); in qla2x00_process_completed_request()
866 qla_printk(KERN_WARNING, ha, in qla2x00_process_completed_request()
881 struct qla_hw_data *ha = rsp->hw; in qla2x00_process_response_queue() local
882 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_process_response_queue()
947 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); in qla2x00_process_response_queue()
999 struct qla_hw_data *ha = vha->hw; in qla2x00_status_entry() local
1004 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_status_entry()
1029 qla_printk(KERN_WARNING, ha, "Status Entry invalid handle.\n"); in qla2x00_status_entry()
1039 qla_printk(KERN_WARNING, ha, in qla2x00_status_entry()
1053 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_status_entry()
1072 if (IS_FWI2_CAPABLE(ha)) in qla2x00_status_entry()
1084 qla2x00_sp_compl(ha, sp); in qla2x00_status_entry()
1090 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && in qla2x00_status_entry()
1112 qla_printk(KERN_INFO, ha, in qla2x00_status_entry()
1151 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_status_entry()
1227 qla_printk(KERN_INFO, ha, in qla2x00_status_entry()
1316 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_status_entry()
1338 qla_printk(KERN_INFO, ha, in qla2x00_status_entry()
1348 qla2x00_sp_compl(ha, sp); in qla2x00_status_entry()
1362 struct qla_hw_data *ha = vha->hw; in qla2x00_status_cont_entry() local
1371 qla_printk(KERN_INFO, ha, in qla2x00_status_cont_entry()
1386 if (IS_FWI2_CAPABLE(ha)) in qla2x00_status_cont_entry()
1397 qla2x00_sp_compl(ha, sp); in qla2x00_status_cont_entry()
1411 struct qla_hw_data *ha = vha->hw; in qla2x00_error_entry() local
1415 qla_printk(KERN_ERR, ha, "%s: Invalid Entry Order\n", __func__); in qla2x00_error_entry()
1417 qla_printk(KERN_ERR, ha, "%s: Invalid Entry Count\n", __func__); in qla2x00_error_entry()
1419 qla_printk(KERN_ERR, ha, in qla2x00_error_entry()
1422 qla_printk(KERN_ERR, ha, "%s: Invalid Entry Type\n", __func__); in qla2x00_error_entry()
1424 qla_printk(KERN_ERR, ha, "%s: Busy\n", __func__); in qla2x00_error_entry()
1426 qla_printk(KERN_ERR, ha, "%s: UNKNOWN flag error\n", __func__); in qla2x00_error_entry()
1449 qla2x00_sp_compl(ha, sp); in qla2x00_error_entry()
1455 qla_printk(KERN_WARNING, ha, in qla2x00_error_entry()
1473 struct qla_hw_data *ha = vha->hw; in qla24xx_mbx_completion() local
1474 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_mbx_completion()
1477 ha->flags.mbox_int = 1; in qla24xx_mbx_completion()
1478 ha->mailbox_out[0] = mb0; in qla24xx_mbx_completion()
1481 for (cnt = 1; cnt < ha->mbx_count; cnt++) { in qla24xx_mbx_completion()
1482 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); in qla24xx_mbx_completion()
1486 if (ha->mcp) { in qla24xx_mbx_completion()
1488 __func__, vha->host_no, ha->mcp->mb[0])); in qla24xx_mbx_completion()
1502 struct qla_hw_data *ha = rsp->hw; in qla24xx_process_response_queue() local
1556 ha->isp_ops->wrt_rsp_reg(ha, rsp->id, rsp->ring_index); in qla24xx_process_response_queue()
1564 struct qla_hw_data *ha = vha->hw; in qla2xxx_check_risc_status() local
1565 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla2xxx_check_risc_status()
1567 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) in qla2xxx_check_risc_status()
1599 qla_printk(KERN_INFO, ha, "Additional code -- 0x55AA.\n"); in qla2xxx_check_risc_status()
1619 struct qla_hw_data *ha; in qla24xx_intr_handler() local
1635 ha = rsp->hw; in qla24xx_intr_handler()
1636 reg = &ha->iobase->isp24; in qla24xx_intr_handler()
1639 spin_lock(&ha->hardware_lock); in qla24xx_intr_handler()
1644 if (pci_channel_offline(ha->pdev)) in qla24xx_intr_handler()
1649 qla_printk(KERN_INFO, ha, "RISC paused -- HCCR=%x, " in qla24xx_intr_handler()
1654 ha->isp_ops->fw_dump(vha, 1); in qla24xx_intr_handler()
1689 spin_unlock(&ha->hardware_lock); in qla24xx_intr_handler()
1691 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && in qla24xx_intr_handler()
1692 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { in qla24xx_intr_handler()
1693 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla24xx_intr_handler()
1694 complete(&ha->mbx_intr_comp); in qla24xx_intr_handler()
1703 struct qla_hw_data *ha; in qla24xx_msix_rsp_q() local
1713 ha = rsp->hw; in qla24xx_msix_rsp_q()
1714 reg = &ha->iobase->isp24; in qla24xx_msix_rsp_q()
1716 spin_lock_irq(&ha->hardware_lock); in qla24xx_msix_rsp_q()
1721 spin_unlock_irq(&ha->hardware_lock); in qla24xx_msix_rsp_q()
1729 struct qla_hw_data *ha; in qla25xx_msix_rsp_q() local
1739 ha = rsp->hw; in qla25xx_msix_rsp_q()
1740 reg = &ha->iobase->isp24; in qla25xx_msix_rsp_q()
1742 spin_lock_irq(&ha->hardware_lock); in qla25xx_msix_rsp_q()
1746 spin_unlock_irq(&ha->hardware_lock); in qla25xx_msix_rsp_q()
1755 struct qla_hw_data *ha; in qla24xx_msix_default() local
1769 ha = rsp->hw; in qla24xx_msix_default()
1770 reg = &ha->iobase->isp24; in qla24xx_msix_default()
1773 spin_lock_irq(&ha->hardware_lock); in qla24xx_msix_default()
1778 if (pci_channel_offline(ha->pdev)) in qla24xx_msix_default()
1783 qla_printk(KERN_INFO, ha, "RISC paused -- HCCR=%x, " in qla24xx_msix_default()
1788 ha->isp_ops->fw_dump(vha, 1); in qla24xx_msix_default()
1822 spin_unlock_irq(&ha->hardware_lock); in qla24xx_msix_default()
1824 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && in qla24xx_msix_default()
1825 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { in qla24xx_msix_default()
1826 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla24xx_msix_default()
1827 complete(&ha->mbx_intr_comp); in qla24xx_msix_default()
1864 qla24xx_disable_msix(struct qla_hw_data *ha) in qla24xx_disable_msix() argument
1869 for (i = 0; i < ha->msix_count; i++) { in qla24xx_disable_msix()
1870 qentry = &ha->msix_entries[i]; in qla24xx_disable_msix()
1874 pci_disable_msix(ha->pdev); in qla24xx_disable_msix()
1875 kfree(ha->msix_entries); in qla24xx_disable_msix()
1876 ha->msix_entries = NULL; in qla24xx_disable_msix()
1877 ha->flags.msix_enabled = 0; in qla24xx_disable_msix()
1881 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) in qla24xx_enable_msix() argument
1889 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count, in qla24xx_enable_msix()
1894 for (i = 0; i < ha->msix_count; i++) in qla24xx_enable_msix()
1897 ret = pci_enable_msix(ha->pdev, entries, ha->msix_count); in qla24xx_enable_msix()
1902 qla_printk(KERN_WARNING, ha, in qla24xx_enable_msix()
1904 " Retry with %d vectors\n", ha->msix_count, ret, ret); in qla24xx_enable_msix()
1905 ha->msix_count = ret; in qla24xx_enable_msix()
1906 ret = pci_enable_msix(ha->pdev, entries, ha->msix_count); in qla24xx_enable_msix()
1909 qla_printk(KERN_WARNING, ha, "MSI-X: Failed to enable" in qla24xx_enable_msix()
1911 ha->msix_count, ret); in qla24xx_enable_msix()
1914 ha->max_queues = ha->msix_count - 1; in qla24xx_enable_msix()
1916 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) * in qla24xx_enable_msix()
1917 ha->msix_count, GFP_KERNEL); in qla24xx_enable_msix()
1918 if (!ha->msix_entries) { in qla24xx_enable_msix()
1922 ha->flags.msix_enabled = 1; in qla24xx_enable_msix()
1924 for (i = 0; i < ha->msix_count; i++) { in qla24xx_enable_msix()
1925 qentry = &ha->msix_entries[i]; in qla24xx_enable_msix()
1933 qentry = &ha->msix_entries[0]; in qla24xx_enable_msix()
1937 qla_printk(KERN_WARNING, ha, in qla24xx_enable_msix()
1940 qla24xx_disable_msix(ha); in qla24xx_enable_msix()
1947 if (ha->max_queues > 1 && ha->mqiobase) { in qla24xx_enable_msix()
1948 ha->mqenable = 1; in qla24xx_enable_msix()
1950 qla_printk(KERN_INFO, ha, in qla24xx_enable_msix()
1952 ha->max_queues); in qla24xx_enable_msix()
1954 ha->mqenable = 0; in qla24xx_enable_msix()
1958 qentry = &ha->msix_entries[1]; in qla24xx_enable_msix()
1962 qla_printk(KERN_WARNING, ha, in qla24xx_enable_msix()
1965 qla24xx_disable_msix(ha); in qla24xx_enable_msix()
1966 ha->mqenable = 0; in qla24xx_enable_msix()
1978 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) in qla2x00_request_irqs() argument
1981 device_reg_t __iomem *reg = ha->iobase; in qla2x00_request_irqs()
1984 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && in qla2x00_request_irqs()
1985 !IS_QLA8432(ha) && !IS_QLA8001(ha)) in qla2x00_request_irqs()
1988 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX || in qla2x00_request_irqs()
1989 !QLA_MSIX_FW_MODE_1(ha->fw_attributes))) { in qla2x00_request_irqs()
1990 DEBUG2(qla_printk(KERN_WARNING, ha, in qla2x00_request_irqs()
1992 ha->pdev->revision, ha->fw_attributes)); in qla2x00_request_irqs()
1997 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && in qla2x00_request_irqs()
1998 (ha->pdev->subsystem_device == 0x7040 || in qla2x00_request_irqs()
1999 ha->pdev->subsystem_device == 0x7041 || in qla2x00_request_irqs()
2000 ha->pdev->subsystem_device == 0x1705)) { in qla2x00_request_irqs()
2001 DEBUG2(qla_printk(KERN_WARNING, ha, in qla2x00_request_irqs()
2003 ha->pdev->subsystem_vendor, in qla2x00_request_irqs()
2004 ha->pdev->subsystem_device)); in qla2x00_request_irqs()
2009 ret = qla24xx_enable_msix(ha, rsp); in qla2x00_request_irqs()
2011 DEBUG2(qla_printk(KERN_INFO, ha, in qla2x00_request_irqs()
2012 "MSI-X: Enabled (0x%X, 0x%X).\n", ha->chip_revision, in qla2x00_request_irqs()
2013 ha->fw_attributes)); in qla2x00_request_irqs()
2016 qla_printk(KERN_WARNING, ha, in qla2x00_request_irqs()
2020 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && in qla2x00_request_irqs()
2021 !IS_QLA8001(ha)) in qla2x00_request_irqs()
2024 ret = pci_enable_msi(ha->pdev); in qla2x00_request_irqs()
2026 DEBUG2(qla_printk(KERN_INFO, ha, "MSI: Enabled.\n")); in qla2x00_request_irqs()
2027 ha->flags.msi_enabled = 1; in qla2x00_request_irqs()
2031 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, in qla2x00_request_irqs()
2034 qla_printk(KERN_WARNING, ha, in qla2x00_request_irqs()
2036 ha->pdev->irq); in qla2x00_request_irqs()
2039 ha->flags.inta_enabled = 1; in qla2x00_request_irqs()
2046 if (IS_QLA81XX(ha)) in qla2x00_request_irqs()
2048 spin_lock_irq(&ha->hardware_lock); in qla2x00_request_irqs()
2049 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_request_irqs()
2057 spin_unlock_irq(&ha->hardware_lock); in qla2x00_request_irqs()
2066 struct qla_hw_data *ha = vha->hw; in qla2x00_free_irqs() local
2067 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla2x00_free_irqs()
2069 if (ha->flags.msix_enabled) in qla2x00_free_irqs()
2070 qla24xx_disable_msix(ha); in qla2x00_free_irqs()
2071 else if (ha->flags.inta_enabled) { in qla2x00_free_irqs()
2072 free_irq(ha->pdev->irq, rsp); in qla2x00_free_irqs()
2073 pci_disable_msi(ha->pdev); in qla2x00_free_irqs()
2081 struct qla_hw_data *ha = rsp->hw; in qla2x00_get_rsp_host() local
2097 vha = pci_get_drvdata(ha->pdev); in qla2x00_get_rsp_host()
2104 struct qla_hw_data *ha = rsp->hw; in qla25xx_request_irq() local
2111 qla_printk(KERN_WARNING, ha, in qla25xx_request_irq()
2122 qla25xx_wrt_rsp_reg(struct qla_hw_data *ha, uint16_t id, uint16_t index) in qla25xx_wrt_rsp_reg() argument
2124 device_reg_t __iomem *reg = (void *) ha->mqiobase + QLA_QUE_PAGE * id; in qla25xx_wrt_rsp_reg()
2129 qla24xx_wrt_rsp_reg(struct qla_hw_data *ha, uint16_t id, uint16_t index) in qla24xx_wrt_rsp_reg() argument
2131 device_reg_t __iomem *reg = (void *) ha->iobase; in qla24xx_wrt_rsp_reg()