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1 /*
2  * FILE NAME
3  *	drivers/pcmcia/vrc4173_cardu.h
4  *
5  * BRIEF MODULE DESCRIPTION
6  *	Include file for NEC VRC4173 CARDU.
7  *
8  * Copyright 2002 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
9  *
10  *  This program is free software; you can redistribute it and/or modify it
11  *  under the terms of the GNU General Public License as published by the
12  *  Free Software Foundation; either version 2 of the License, or (at your
13  *  option) any later version.
14  *
15  *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16  *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20  *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
21  *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
22  *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
23  *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
24  *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  *  You should have received a copy of the GNU General Public License along
27  *  with this program; if not, write to the Free Software Foundation, Inc.,
28  *  675 Mass Ave, Cambridge, MA 02139, USA.
29  */
30 #ifndef _VRC4173_CARDU_H
31 #define _VRC4173_CARDU_H
32 
33 #include <linux/pci.h>
34 
35 #include <pcmcia/ss.h>
36 
37 #define CARDU_MAX_SOCKETS	2
38 #define CARDU1			0
39 #define CARDU2			1
40 
41 /*
42  * PCI Configuration Registers
43  */
44 #define BRGCNT			0x3e
45  #define POST_WR_EN		0x0400
46  #define MEM1_PREF_EN		0x0200
47  #define MEM0_PREF_EN		0x0100
48  #define IREQ_INT		0x0080
49  #define CARD_RST		0x0040
50  #define MABORT_MODE		0x0020
51  #define VGA_EN			0x0008
52  #define ISA_EN			0x0004
53  #define SERR_EN		0x0002
54  #define PERR_EN		0x0001
55 
56 #define SYSCNT			0x80
57  #define BAD_VCC_REQ_DISB	0x00200000
58  #define PCPCI_EN		0x00080000
59  #define CH_ASSIGN_MASK		0x00070000
60  #define CH_ASSIGN_NODMA	0x00040000
61  #define SUB_ID_WR_EN		0x00000008
62  #define ASYN_INT_MODE		0x00000004
63  #define PCI_CLK_RIN		0x00000002
64 
65 #define DEVCNT			0x91
66  #define ZOOM_VIDEO_EN		0x40
67  #define SR_PCI_INT_SEL_MASK	0x18
68  #define SR_PCI_INT_SEL_NONE	0x00
69  #define PCI_INT_MODE		0x04
70  #define IRQ_MODE		0x02
71  #define IFG			0x01
72 
73 #define CHIPCNT			0x9c
74  #define S_PREF_DISB		0x10
75 
76 #define SERRDIS			0x9f
77  #define SERR_DIS_MAB		0x10
78  #define SERR_DIS_TAB		0x08
79  #define SERR_DIS_DT_PERR	0x04
80 
81 /*
82  * ExCA Registers
83  */
84 #define EXCA_REGS_BASE		0x800
85 #define EXCA_REGS_SIZE		0x800
86 
87 #define ID_REV			0x000
88  #define IF_TYPE_16BIT		0x80
89 
90 #define IF_STATUS		0x001
91  #define CARD_PWR		0x40
92  #define READY			0x20
93  #define CARD_WP		0x10
94  #define CARD_DETECT2		0x08
95  #define CARD_DETECT1		0x04
96  #define BV_DETECT_MASK		0x03
97  #define BV_DETECT_GOOD		0x03	/* Memory card */
98  #define BV_DETECT_WARN		0x02
99  #define BV_DETECT_BAD1		0x01
100  #define BV_DETECT_BAD0		0x00
101  #define STSCHG			0x02	/* I/O card */
102  #define SPKR			0x01
103 
104 #define PWR_CNT			0x002
105  #define CARD_OUT_EN		0x80
106  #define VCC_MASK		0x18
107  #define VCC_3V			0x18
108  #define VCC_5V			0x10
109  #define VCC_0V			0x00
110  #define VPP_MASK		0x03
111  #define VPP_12V		0x02
112  #define VPP_VCC		0x01
113  #define VPP_0V			0x00
114 
115 #define INT_GEN_CNT		0x003
116  #define CARD_REST0		0x40
117  #define CARD_TYPE_MASK		0x20
118  #define CARD_TYPE_IO		0x20
119  #define CARD_TYPE_MEM		0x00
120 
121 #define CARD_SC			0x004
122  #define CARD_DT_CHG		0x08
123  #define RDY_CHG		0x04
124  #define BAT_WAR_CHG		0x02
125  #define BAT_DEAD_ST_CHG	0x01
126 
127 #define CARD_SCI		0x005
128  #define CARD_DT_EN		0x08
129  #define RDY_EN			0x04
130  #define BAT_WAR_EN		0x02
131  #define BAT_DEAD_EN		0x01
132 
133 #define ADR_WIN_EN		0x006
134  #define IO_WIN_EN(x)		(0x40 << (x))
135  #define MEM_WIN_EN(x)		(0x01 << (x))
136 
137 #define IO_WIN_CNT		0x007
138  #define IO_WIN_CNT_MASK(x)	(0x03 << ((x) << 2))
139  #define IO_WIN_DATA_AUTOSZ(x)	(0x02 << ((x) << 2))
140  #define IO_WIN_DATA_16BIT(x)	(0x01 << ((x) << 2))
141 
142 #define IO_WIN_SA(x)		(0x008 + ((x) << 2))
143 #define IO_WIN_EA(x)		(0x00a + ((x) << 2))
144 
145 #define MEM_WIN_SA(x)		(0x010 + ((x) << 3))
146  #define MEM_WIN_DSIZE		0x8000
147 
148 #define MEM_WIN_EA(x)		(0x012 + ((x) << 3))
149 
150 #define MEM_WIN_OA(x)		(0x014 + ((x) << 3))
151  #define MEM_WIN_WP		0x8000
152  #define MEM_WIN_REGSET		0x4000
153 
154 #define GEN_CNT			0x016
155  #define VS2_STATUS		0x80
156  #define VS1_STATUS		0x40
157  #define EXCA_REG_RST_EN	0x02
158 
159 #define GLO_CNT			0x01e
160  #define FUN_INT_LEV		0x08
161  #define INT_WB_CLR		0x04
162  #define CSC_INT_LEV		0x02
163 
164 #define IO_WIN_OAL(x)		(0x036 + ((x) << 1))
165 #define IO_WIN_OAH(x)		(0x037 + ((x) << 1))
166 
167 #define MEM_WIN_SAU(x)		(0x040 + (x))
168 
169 #define IO_SETUP_TIM		0x080
170 #define IO_CMD_TIM		0x081
171 #define IO_HOLD_TIM		0x082
172 #define MEM_SETUP_TIM(x)	(0x084 + ((x) << 2))
173 #define MEM_CMD_TIM(x)		(0x085 + ((x) << 2))
174 #define MEM_HOLD_TIM(x)		(0x086 + ((x) << 2))
175  #define TIM_CLOCKS(x)		((x) - 1)
176 
177 #define MEM_TIM_SEL1		0x08c
178 #define MEM_TIM_SEL2		0x08d
179  #define MEM_WIN_TIMSEL1(x)	(0x03 << (((x) & 3) << 1))
180 
181 #define MEM_WIN_PWEN		0x091
182  #define POSTWEN		0x01
183 
184 /*
185  * CardBus Socket Registers
186  */
187 #define CARDBUS_SOCKET_REGS_BASE	0x000
188 #define CARDBUS_SOCKET_REGS_SIZE	0x800
189 
190 #define SKT_EV			0x000
191  #define POW_CYC_EV		0x00000008
192  #define CCD2_EV		0x00000004
193  #define CCD1_EV		0x00000002
194  #define CSTSCHG_EV		0x00000001
195 
196 #define SKT_MASK		0x004
197  #define POW_CYC_MASK		0x00000008
198  #define CCD_MASK		0x00000006
199  #define CSC_MASK		0x00000001
200 
201 #define SKT_PRE_STATE		0x008
202 #define SKT_FORCE_EV		0x00c
203  #define VOL_3V_SKT		0x20000000
204  #define VOL_5V_SKT		0x10000000
205  #define CVS_TEST		0x00004000
206  #define VOL_YV_CARD_DT		0x00002000
207  #define VOL_XV_CARD_DT		0x00001000
208  #define VOL_3V_CARD_DT		0x00000800
209  #define VOL_5V_CARD_DT		0x00000400
210  #define BAD_VCC_REQ		0x00000200
211  #define DATA_LOST		0x00000100
212  #define NOT_A_CARD		0x00000080
213  #define CREADY			0x00000040
214  #define CB_CARD_DT		0x00000020
215  #define R2_CARD_DT		0x00000010
216  #define POW_UP			0x00000008
217  #define CCD20			0x00000004
218  #define CCD10			0x00000002
219  #define CSTSCHG		0x00000001
220 
221 #define SKT_CNT			0x010
222  #define STP_CLK_EN		0x00000080
223  #define VCC_CNT_MASK		0x00000070
224  #define VCC_CNT_3V		0x00000030
225  #define VCC_CNT_5V		0x00000020
226  #define VCC_CNT_0V		0x00000000
227  #define VPP_CNT_MASK		0x00000007
228  #define VPP_CNT_3V		0x00000003
229  #define VPP_CNT_5V		0x00000002
230  #define VPP_CNT_12V		0x00000001
231  #define VPP_CNT_0V		0x00000000
232 
233 typedef struct vrc4173_socket {
234 	int noprobe;
235 	struct pci_dev *dev;
236 	void *base;
237 	void (*handler)(void *, unsigned int);
238 	void *info;
239 	socket_cap_t cap;
240 	spinlock_t event_lock;
241 	uint16_t events;
242 	struct socket_info_t *pcmcia_socket;
243 	struct work_struct tq_work;
244 	char name[20];
245 } vrc4173_socket_t;
246 
247 #endif /* _VRC4173_CARDU_H */
248