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Searched defs:DMA5_IRQ_STATUS (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h312 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h329 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h329 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h307 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register … macro
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h319 #define DMA5_IRQ_STATUS 0xffc00d68 /* DMA Channel 5 Interrupt/Status Register */ macro
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h326 #define DMA5_IRQ_STATUS 0xFFC00D68 /* DMA Channel 5 Interrupt/Status Register */ macro