| /arch/cris/include/arch-v32/arch/hwregs/iop/ |
| D | iop_mpu_macros.h | 96 #define MPU_ADD_RRR(S,N,D) (0x4000008C | ((S & ((1 << 5) - 1)) << 16)\ argument
100 #define MPU_ADD_RRS(S,N,D) (0x4000048C | ((S & ((1 << 5) - 1)) << 16)\ argument
104 #define MPU_ADD_RSR(S,N,D) (0x4000018C | ((S & ((1 << 5) - 1)) << 16)\ argument
108 #define MPU_ADD_RSS(S,N,D) (0x4000058C | ((S & ((1 << 5) - 1)) << 16)\ argument
112 #define MPU_ADD_SRR(S,N,D) (0x4000028C | ((S & ((1 << 5) - 1)) << 16)\ argument
116 #define MPU_ADD_SRS(S,N,D) (0x4000068C | ((S & ((1 << 5) - 1)) << 16)\ argument
120 #define MPU_ADD_SSR(S,N,D) (0x4000038C | ((S & ((1 << 5) - 1)) << 16)\ argument
124 #define MPU_ADD_SSS(S,N,D) (0x4000078C | ((S & ((1 << 5) - 1)) << 16)\ argument
128 #define MPU_ADDQ_RIR(S,N,D) (0x10000000 | ((S & ((1 << 5) - 1)) << 16)\ argument
132 #define MPU_ADDQ_IRR(S,N,D) (0x10000000 | ((S & ((1 << 16) - 1)) << 0)\ argument
[all …]
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| /arch/mips/fw/arc/ |
| D | file.c | 18 ULONG N, ULONG *Count) in ArcGetDirectoryEntry()
36 ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count) in ArcRead()
48 ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count) in ArcWrite()
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| /arch/ia64/lib/ |
| D | memcpy.S | 37 # define N (MEM_LAT + 4) macro
176 # define N (MEM_LAT + 5) /* number of stages */ macro
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| D | copy_page_mck.S | 97 #define N (D + 1) macro
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| D | memcpy_mck.S | 65 #define N (D + 1) macro
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| /arch/avr32/mach-at32ap/include/mach/ |
| D | at32ap700x.h | 27 #define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) argument
28 #define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) argument
29 #define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) argument
30 #define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) argument
31 #define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) argument
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| /arch/mips/include/asm/mips-boards/ |
| D | bonito64.h | 356 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) argument
357 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) argument
358 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) argument
377 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) argument
378 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) argument
379 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) argument
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| /arch/sh/math-emu/ |
| D | math.c | 68 #define CMP_X(SZ,R,M,N) do{ \ argument
72 #define EQ_X(SZ,R,M,N) do{ \ argument
99 #define ARITH_X(SZ,OP,M,N) do{ \ argument
285 #define EMU_FLOAT_X(SZ,N) do { \ in NOTYETn() argument
301 #define EMU_FTRC_X(SZ,N) do { \ argument
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| /arch/powerpc/boot/dtc-src/ |
| D | srcpos.h | 51 #define YYLLOC_DEFAULT(Current, Rhs, N) \ argument
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| /arch/m68k/fpsp040/ |
| D | stan.S | 158 .set N,L_SCR3 define
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| D | stwotox.S | 175 .set N,L_SCR1 define
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| D | ssin.S | 143 .set N,L_SCR2 define
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| /arch/frv/kernel/ |
| D | irq.c | 40 #define set_IRR(N,A,B,C,D) __set_IRR(N, (A << 28) | (B << 24) | (C << 20) | (D << 16)) argument
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| D | setup.c | 125 #define _frac(N,D) ((N)<<4 | (D)) argument
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| /arch/sparc/include/asm/ |
| D | head_64.h | 11 #define GET_GL_GLOBAL(N) \ argument
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| /arch/x86/kernel/cpu/ |
| D | perfctr-watchdog.c | 437 #define P4_ESCR_EVENT_SELECT(N) ((N) << 25) argument
442 #define P4_CCCR_THRESHOLD(N) ((N) << 20) argument
446 #define P4_CCCR_ESCR_SELECT(N) ((N) << 13) argument
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| /arch/alpha/include/asm/ |
| D | core_cia.h | 204 #define CIA_IOC_PCI_Wn_BASE(N) (IDENT_ADDR + 0x8760000400UL + (N)*0x100) argument
205 #define CIA_IOC_PCI_Wn_MASK(N) (IDENT_ADDR + 0x8760000440UL + (N)*0x100) argument
206 #define CIA_IOC_PCI_Tn_BASE(N) (IDENT_ADDR + 0x8760000480UL + (N)*0x100) argument
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| /arch/mips/include/asm/mach-au1x00/ |
| D | au1000.h | 203 #define MEM_SDMODE_RS_N(N) ((N) << 18) argument
209 #define MEM_SDMODE_CS_N(N) ((N) << 15) argument
210 #define MEM_SDMODE_TRAS_N(N) ((N) << 11) argument
211 #define MEM_SDMODE_TMRD_N(N) ((N) << 9) argument
212 #define MEM_SDMODE_TWR_N(N) ((N) << 7) argument
213 #define MEM_SDMODE_TRP_N(N) ((N) << 5) argument
214 #define MEM_SDMODE_TRCD_N(N) ((N) << 3) argument
215 #define MEM_SDMODE_TCL_N(N) ((N) << 0) argument
223 #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) argument
224 #define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) argument
[all …]
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| /arch/arm/mach-pxa/ |
| D | pxa25x.c | 64 unsigned int l, L, m, M, n2, N; in pxa25x_get_clk_frequency_khz() local
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| D | pxa27x.c | 55 unsigned int l, L, m, M, n2, N, S; in pxa27x_get_clk_frequency_khz() local
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| /arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 380 #define COPY_BYTE(N) \ argument
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| /arch/mips/lib/ |
| D | memcpy-inatomic.S | 399 #define COPY_BYTE(N) \ argument
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| D | memcpy.S | 410 #define COPY_BYTE(N) \ argument
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| /arch/x86/math-emu/ |
| D | fpu_trig.c | 876 int exp_1, N; in do_fprem() local
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 21 #define N (-1) macro
|