1 /* 2 * OMAP2/3 powerdomain control 3 * 4 * Copyright (C) 2007-8 Texas Instruments, Inc. 5 * Copyright (C) 2007-8 Nokia Corporation 6 * 7 * Written by Paul Walmsley 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN 15 #define ASM_ARM_ARCH_OMAP_POWERDOMAIN 16 17 #include <linux/types.h> 18 #include <linux/list.h> 19 20 #include <asm/atomic.h> 21 22 #include <mach/cpu.h> 23 24 25 /* Powerdomain basic power states */ 26 #define PWRDM_POWER_OFF 0x0 27 #define PWRDM_POWER_RET 0x1 28 #define PWRDM_POWER_INACTIVE 0x2 29 #define PWRDM_POWER_ON 0x3 30 31 /* Powerdomain allowable state bitfields */ 32 #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ 33 (1 << PWRDM_POWER_ON)) 34 35 #define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \ 36 (1 << PWRDM_POWER_RET)) 37 38 #define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON)) 39 40 41 /* Powerdomain flags */ 42 #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ 43 44 45 /* 46 * Number of memory banks that are power-controllable. On OMAP3430, the 47 * maximum is 4. 48 */ 49 #define PWRDM_MAX_MEM_BANKS 4 50 51 /* 52 * Maximum number of clockdomains that can be associated with a powerdomain. 53 * CORE powerdomain is probably the worst case. 54 */ 55 #define PWRDM_MAX_CLKDMS 3 56 57 /* XXX A completely arbitrary number. What is reasonable here? */ 58 #define PWRDM_TRANSITION_BAILOUT 100000 59 60 struct clockdomain; 61 struct powerdomain; 62 63 /* Encodes dependencies between powerdomains - statically defined */ 64 struct pwrdm_dep { 65 66 /* Powerdomain name */ 67 const char *pwrdm_name; 68 69 /* Powerdomain pointer - resolved by the powerdomain code */ 70 struct powerdomain *pwrdm; 71 72 /* Flags to mark OMAP chip restrictions, etc. */ 73 const struct omap_chip_id omap_chip; 74 75 }; 76 77 struct powerdomain { 78 79 /* Powerdomain name */ 80 const char *name; 81 82 /* the address offset from CM_BASE/PRM_BASE */ 83 const s16 prcm_offs; 84 85 /* Used to represent the OMAP chip types containing this pwrdm */ 86 const struct omap_chip_id omap_chip; 87 88 /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ 89 const u8 dep_bit; 90 91 /* Powerdomains that can be told to wake this powerdomain up */ 92 struct pwrdm_dep *wkdep_srcs; 93 94 /* Powerdomains that can be told to keep this pwrdm from inactivity */ 95 struct pwrdm_dep *sleepdep_srcs; 96 97 /* Possible powerdomain power states */ 98 const u8 pwrsts; 99 100 /* Possible logic power states when pwrdm in RETENTION */ 101 const u8 pwrsts_logic_ret; 102 103 /* Powerdomain flags */ 104 const u8 flags; 105 106 /* Number of software-controllable memory banks in this powerdomain */ 107 const u8 banks; 108 109 /* Possible memory bank pwrstates when pwrdm in RETENTION */ 110 const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS]; 111 112 /* Possible memory bank pwrstates when pwrdm is ON */ 113 const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS]; 114 115 /* Clockdomains in this powerdomain */ 116 struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; 117 118 struct list_head node; 119 120 }; 121 122 123 void pwrdm_init(struct powerdomain **pwrdm_list); 124 125 int pwrdm_register(struct powerdomain *pwrdm); 126 int pwrdm_unregister(struct powerdomain *pwrdm); 127 struct powerdomain *pwrdm_lookup(const char *name); 128 129 int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm)); 130 131 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 132 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 133 int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, 134 int (*fn)(struct powerdomain *pwrdm, 135 struct clockdomain *clkdm)); 136 137 int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 138 int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 139 int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 140 int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 141 int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 142 int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2); 143 144 int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); 145 146 int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst); 147 int pwrdm_read_next_pwrst(struct powerdomain *pwrdm); 148 int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm); 149 int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm); 150 151 int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst); 152 int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); 153 int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst); 154 155 int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm); 156 int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm); 157 int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank); 158 int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank); 159 160 int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm); 161 int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm); 162 bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm); 163 164 int pwrdm_wait_transition(struct powerdomain *pwrdm); 165 166 #endif 167