/arch/sparc/include/asm/ |
D | asm.h | 13 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument 15 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 17 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument 19 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 26 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \ argument 29 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \ argument 32 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \ argument 35 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \ argument
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D | tsb.h | 76 #define TSB_LOAD_QUAD(TSB, REG) \ argument 84 #define TSB_LOAD_TAG_HIGH(TSB, REG) \ argument 91 #define TSB_LOAD_TAG(TSB, REG) \ argument 136 #define KTSB_LOAD_QUAD(TSB, REG) \ argument
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D | cpudata_64.h | 141 #define __GET_CPUID(REG) \ argument
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/arch/sparc/kernel/ |
D | psycho_common.h | 14 #define PSYCHO_CONFIG_ENCODE(BUS, DEVFN, REG) \ argument
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D | prom_irqtrans.c | 101 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \ argument
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D | pci_schizo.c | 72 #define SCHIZO_CONFIG_ENCODE(BUS, DEVFN, REG) \ argument
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/arch/arm/mach-netx/include/mach/ |
D | uncompress.h | 29 #define REG(x) (*(volatile unsigned long *)(x)) macro
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/arch/m68knommu/lib/ |
D | mulsi3.S | 66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
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D | umodsi3.S | 66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
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D | modsi3.S | 66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
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D | divsi3.S | 66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
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D | udivsi3.S | 66 #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) macro
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/arch/powerpc/kernel/ |
D | process.c | 492 #define REG "%016lx" macro 496 #define REG "%08lx" macro
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/arch/powerpc/xmon/ |
D | xmon.c | 164 #define REG "%.16lx" macro 168 #define REG "%.8lx" macro
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/arch/powerpc/include/asm/ |
D | reg.h | 621 #define MTFSF_L(REG) \ argument 624 #define MTFSF_L(REG) mtfsf 0xff, (REG) argument
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/arch/mips/include/asm/ |
D | gic.h | 27 #define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) macro
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