1 #ifndef __WINBOND_PHY_CALIBRATION_H 2 #define __WINBOND_PHY_CALIBRATION_H 3 4 #include "wbhal_f.h" 5 6 // 20031229 Turbo add 7 #define REG_AGC_CTRL1 0x1000 8 #define REG_AGC_CTRL2 0x1004 9 #define REG_AGC_CTRL3 0x1008 10 #define REG_AGC_CTRL4 0x100C 11 #define REG_AGC_CTRL5 0x1010 12 #define REG_AGC_CTRL6 0x1014 13 #define REG_AGC_CTRL7 0x1018 14 #define REG_AGC_CTRL8 0x101C 15 #define REG_AGC_CTRL9 0x1020 16 #define REG_AGC_CTRL10 0x1024 17 #define REG_CCA_CTRL 0x1028 18 #define REG_A_ACQ_CTRL 0x102C 19 #define REG_B_ACQ_CTRL 0x1030 20 #define REG_A_TXRX_CTRL 0x1034 21 #define REG_B_TXRX_CTRL 0x1038 22 #define REG_A_TX_COEF3 0x103C 23 #define REG_A_TX_COEF2 0x1040 24 #define REG_A_TX_COEF1 0x1044 25 #define REG_B_TX_COEF2 0x1048 26 #define REG_B_TX_COEF1 0x104C 27 #define REG_MODE_CTRL 0x1050 28 #define REG_CALIB_DATA 0x1054 29 #define REG_IQ_ALPHA 0x1058 30 #define REG_DC_CANCEL 0x105C 31 #define REG_WTO_READ 0x1060 32 #define REG_OFFSET_READ 0x1064 33 #define REG_CALIB_READ1 0x1068 34 #define REG_CALIB_READ2 0x106C 35 #define REG_A_FREQ_EST 0x1070 36 37 38 39 40 // 20031101 Turbo add 41 #define MASK_AMER_OFF_REG BIT(31) 42 43 #define MASK_BMER_OFF_REG BIT(31) 44 45 #define MASK_LNA_FIX_GAIN (BIT(3)|BIT(4)) 46 #define MASK_AGC_FIX BIT(1) 47 48 #define MASK_AGC_FIX_GAIN 0xFF00 49 50 #define MASK_ADC_DC_CAL_STR BIT(10) 51 #define MASK_CALIB_START BIT(4) 52 #define MASK_IQCAL_TONE_SEL (BIT(3)|BIT(2)) 53 #define MASK_IQCAL_MODE (BIT(1)|BIT(0)) 54 55 #define MASK_TX_CAL_0 0xF0000000 56 #define TX_CAL_0_SHIFT 28 57 #define MASK_TX_CAL_1 0x0F000000 58 #define TX_CAL_1_SHIFT 24 59 #define MASK_TX_CAL_2 0x00F00000 60 #define TX_CAL_2_SHIFT 20 61 #define MASK_TX_CAL_3 0x000F0000 62 #define TX_CAL_3_SHIFT 16 63 #define MASK_RX_CAL_0 0x0000F000 64 #define RX_CAL_0_SHIFT 12 65 #define MASK_RX_CAL_1 0x00000F00 66 #define RX_CAL_1_SHIFT 8 67 #define MASK_RX_CAL_2 0x000000F0 68 #define RX_CAL_2_SHIFT 4 69 #define MASK_RX_CAL_3 0x0000000F 70 #define RX_CAL_3_SHIFT 0 71 72 #define MASK_CANCEL_DC_I 0x3E0 73 #define CANCEL_DC_I_SHIFT 5 74 #define MASK_CANCEL_DC_Q 0x01F 75 #define CANCEL_DC_Q_SHIFT 0 76 77 // LA20040210 kevin 78 //#define MASK_ADC_DC_CAL_I(x) (((x)&0x1FE00)>>9) 79 //#define MASK_ADC_DC_CAL_Q(x) ((x)&0x1FF) 80 #define MASK_ADC_DC_CAL_I(x) (((x)&0x0003FE00)>>9) 81 #define MASK_ADC_DC_CAL_Q(x) ((x)&0x000001FF) 82 83 // LA20040210 kevin (Turbo has wrong definition) 84 //#define MASK_IQCAL_TONE_I 0x7FFC000 85 //#define SHIFT_IQCAL_TONE_I(x) ((x)>>13) 86 //#define MASK_IQCAL_TONE_Q 0x1FFF 87 //#define SHIFT_IQCAL_TONE_Q(x) ((x)>>0) 88 #define MASK_IQCAL_TONE_I 0x00001FFF 89 #define SHIFT_IQCAL_TONE_I(x) ((x)>>0) 90 #define MASK_IQCAL_TONE_Q 0x03FFE000 91 #define SHIFT_IQCAL_TONE_Q(x) ((x)>>13) 92 93 // LA20040210 kevin (Turbo has wrong definition) 94 //#define MASK_IQCAL_IMAGE_I 0x7FFC000 95 //#define SHIFT_IQCAL_IMAGE_I(x) ((x)>>13) 96 //#define MASK_IQCAL_IMAGE_Q 0x1FFF 97 //#define SHIFT_IQCAL_IMAGE_Q(x) ((x)>>0) 98 99 //#define MASK_IQCAL_IMAGE_I 0x00001FFF 100 //#define SHIFT_IQCAL_IMAGE_I(x) ((x)>>0) 101 //#define MASK_IQCAL_IMAGE_Q 0x03FFE000 102 //#define SHIFT_IQCAL_IMAGE_Q(x) ((x)>>13) 103 104 void phy_set_rf_data( phw_data_t pHwData, u32 index, u32 value ); 105 #define phy_init_rf( _A ) //RFSynthesizer_initial( _A ) 106 107 #endif 108