1 /* arch/arm/mach-s3c2410/include/mach/regs-gpioj.h 2 * 3 * Copyright (c) 2004 Simtec Electronics <linux@simtec.co.uk> 4 * http://www.simtec.co.uk/products/SWLINUX/ 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * S3C2440 GPIO J register definitions 11 */ 12 13 14 #ifndef __ASM_ARCH_REGS_GPIOJ_H 15 #define __ASM_ARCH_REGS_GPIOJ_H "gpioj" 16 17 /* Port J consists of 13 GPIO/Camera pins 18 * 19 * GPJCON has 2 bits for each of the input pins on port F 20 * 00 = 0 input, 1 output, 2 Camera 21 * 22 * pull up works like all other ports. 23 */ 24 25 #define S3C2440_GPIO_BANKJ (416) 26 27 #define S3C2440_GPJCON S3C2410_GPIOREG(0xd0) 28 #define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4) 29 #define S3C2440_GPJUP S3C2410_GPIOREG(0xd8) 30 31 #define S3C2413_GPJCON S3C2410_GPIOREG(0x80) 32 #define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) 33 #define S3C2413_GPJUP S3C2410_GPIOREG(0x88) 34 #define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) 35 36 #define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0) 37 #define S3C2440_GPJ0_INP (0x00 << 0) 38 #define S3C2440_GPJ0_OUTP (0x01 << 0) 39 #define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) 40 41 #define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1) 42 #define S3C2440_GPJ1_INP (0x00 << 2) 43 #define S3C2440_GPJ1_OUTP (0x01 << 2) 44 #define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) 45 46 #define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2) 47 #define S3C2440_GPJ2_INP (0x00 << 4) 48 #define S3C2440_GPJ2_OUTP (0x01 << 4) 49 #define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) 50 51 #define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3) 52 #define S3C2440_GPJ3_INP (0x00 << 6) 53 #define S3C2440_GPJ3_OUTP (0x01 << 6) 54 #define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) 55 56 #define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4) 57 #define S3C2440_GPJ4_INP (0x00 << 8) 58 #define S3C2440_GPJ4_OUTP (0x01 << 8) 59 #define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) 60 61 #define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5) 62 #define S3C2440_GPJ5_INP (0x00 << 10) 63 #define S3C2440_GPJ5_OUTP (0x01 << 10) 64 #define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) 65 66 #define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6) 67 #define S3C2440_GPJ6_INP (0x00 << 12) 68 #define S3C2440_GPJ6_OUTP (0x01 << 12) 69 #define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) 70 71 #define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7) 72 #define S3C2440_GPJ7_INP (0x00 << 14) 73 #define S3C2440_GPJ7_OUTP (0x01 << 14) 74 #define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) 75 76 #define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8) 77 #define S3C2440_GPJ8_INP (0x00 << 16) 78 #define S3C2440_GPJ8_OUTP (0x01 << 16) 79 #define S3C2440_GPJ8_CAMPCLK (0x02 << 16) 80 81 #define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9) 82 #define S3C2440_GPJ9_INP (0x00 << 18) 83 #define S3C2440_GPJ9_OUTP (0x01 << 18) 84 #define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) 85 86 #define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10) 87 #define S3C2440_GPJ10_INP (0x00 << 20) 88 #define S3C2440_GPJ10_OUTP (0x01 << 20) 89 #define S3C2440_GPJ10_CAMHREF (0x02 << 20) 90 91 #define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11) 92 #define S3C2440_GPJ11_INP (0x00 << 22) 93 #define S3C2440_GPJ11_OUTP (0x01 << 22) 94 #define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) 95 96 #define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12) 97 #define S3C2440_GPJ12_INP (0x00 << 24) 98 #define S3C2440_GPJ12_OUTP (0x01 << 24) 99 #define S3C2440_GPJ12_CAMRESET (0x02 << 24) 100 101 #define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13) 102 #define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14) 103 #define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15) 104 105 #endif /* __ASM_ARCH_REGS_GPIOJ_H */ 106 107