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1 /*
2  * arch/arm/mach-w90x900/include/mach/map.h
3  *
4  * Copyright (c) 2008 Nuvoton technology corporation
5  * All rights reserved.
6  *
7  * Wan ZongShun <mcuos.com@gmail.com>
8  *
9  * Based on arch/arm/mach-s3c2410/include/mach/map.h
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  */
17 
18 #ifndef __ASM_ARCH_MAP_H
19 #define __ASM_ARCH_MAP_H
20 
21 #ifndef __ASSEMBLY__
22 #define W90X900_ADDR(x)		((void __iomem *)(0xF0000000 + (x)))
23 #else
24 #define W90X900_ADDR(x)		(0xF0000000 + (x))
25 #endif
26 
27 #define AHB_IO_BASE		0xB0000000
28 #define APB_IO_BASE		0xB8000000
29 #define CLOCKPW_BASE		(APB_IO_BASE+0x200)
30 #define AIC_IO_BASE		(APB_IO_BASE+0x2000)
31 #define TIMER_IO_BASE		(APB_IO_BASE+0x1000)
32 
33 /*
34  * interrupt controller is the first thing we put in, to make
35  * the assembly code for the irq detection easier
36  */
37 
38 #define W90X900_VA_IRQ		W90X900_ADDR(0x00000000)
39 #define W90X900_PA_IRQ		(0xB8002000)
40 #define W90X900_SZ_IRQ		SZ_4K
41 
42 #define W90X900_VA_GCR		W90X900_ADDR(0x08002000)
43 #define W90X900_PA_GCR		(0xB0000000)
44 #define W90X900_SZ_GCR		SZ_4K
45 
46 /* Clock and Power management */
47 
48 #define W90X900_VA_CLKPWR	(W90X900_VA_GCR+0x200)
49 #define W90X900_PA_CLKPWR	(0xB0000200)
50 #define W90X900_SZ_CLKPWR	SZ_4K
51 
52 /* EBI management */
53 
54 #define W90X900_VA_EBI		W90X900_ADDR(0x00001000)
55 #define W90X900_PA_EBI		(0xB0001000)
56 #define W90X900_SZ_EBI		SZ_4K
57 
58 /* UARTs */
59 
60 #define W90X900_VA_UART		W90X900_ADDR(0x08000000)
61 #define W90X900_PA_UART		(0xB8000000)
62 #define W90X900_SZ_UART		SZ_4K
63 
64 /* Timers */
65 
66 #define W90X900_VA_TIMER	W90X900_ADDR(0x08001000)
67 #define W90X900_PA_TIMER	(0xB8001000)
68 #define W90X900_SZ_TIMER	SZ_4K
69 
70 /* GPIO ports */
71 
72 #define W90X900_VA_GPIO		W90X900_ADDR(0x08003000)
73 #define W90X900_PA_GPIO		(0xB8003000)
74 #define W90X900_SZ_GPIO		SZ_4K
75 
76 #endif /* __ASM_ARCH_MAP_H */
77