1 /*
2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
7 * Written by Jacob Shin - AMD, Inc.
8 *
9 * Support : jacob.shin@amd.com
10 *
11 * April 2006
12 * - added support for AMD Family 0x10 processors
13 *
14 * All MC4_MISCi registers are shared between multi-cores
15 */
16
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
27 #include <asm/apic.h>
28 #include <asm/mce.h>
29 #include <asm/msr.h>
30 #include <asm/percpu.h>
31 #include <asm/idle.h>
32
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
35 #define NR_BANKS 6
36 #define NR_BLOCKS 9
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_CNTP_HI 0x40000000
41 #define MASK_LOCKED_HI 0x20000000
42 #define MASK_LVTOFF_HI 0x00F00000
43 #define MASK_COUNT_EN_HI 0x00080000
44 #define MASK_INT_TYPE_HI 0x00060000
45 #define MASK_OVERFLOW_HI 0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO 0xFF000000
48 #define MCG_XBLK_ADDR 0xC0000400
49
50 struct threshold_block {
51 unsigned int block;
52 unsigned int bank;
53 unsigned int cpu;
54 u32 address;
55 u16 interrupt_enable;
56 u16 threshold_limit;
57 struct kobject kobj;
58 struct list_head miscj;
59 };
60
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults = {
63 .interrupt_enable = 0,
64 .threshold_limit = THRESHOLD_MAX,
65 };
66
67 struct threshold_bank {
68 struct kobject *kobj;
69 struct threshold_block *blocks;
70 cpumask_t cpus;
71 };
72 static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
73
74 #ifdef CONFIG_SMP
75 static unsigned char shared_bank[NR_BANKS] = {
76 0, 0, 0, 0, 1
77 };
78 #endif
79
80 static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
81
82 /*
83 * CPU Initialization
84 */
85
86 struct thresh_restart {
87 struct threshold_block *b;
88 int reset;
89 u16 old_limit;
90 };
91
92 /* must be called with correct cpu affinity */
threshold_restart_bank(void * _tr)93 static long threshold_restart_bank(void *_tr)
94 {
95 struct thresh_restart *tr = _tr;
96 u32 mci_misc_hi, mci_misc_lo;
97
98 rdmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
99
100 if (tr->b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
101 tr->reset = 1; /* limit cannot be lower than err count */
102
103 if (tr->reset) { /* reset err count and overflow bit */
104 mci_misc_hi =
105 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
106 (THRESHOLD_MAX - tr->b->threshold_limit);
107 } else if (tr->old_limit) { /* change limit w/o reset */
108 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
109 (tr->old_limit - tr->b->threshold_limit);
110 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
111 (new_count & THRESHOLD_MAX);
112 }
113
114 tr->b->interrupt_enable ?
115 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
116 (mci_misc_hi &= ~MASK_INT_TYPE_HI);
117
118 mci_misc_hi |= MASK_COUNT_EN_HI;
119 wrmsr(tr->b->address, mci_misc_lo, mci_misc_hi);
120 return 0;
121 }
122
123 /* cpu init entry point, called from mce.c with preempt off */
mce_amd_feature_init(struct cpuinfo_x86 * c)124 void mce_amd_feature_init(struct cpuinfo_x86 *c)
125 {
126 unsigned int bank, block;
127 unsigned int cpu = smp_processor_id();
128 u8 lvt_off;
129 u32 low = 0, high = 0, address = 0;
130 struct thresh_restart tr;
131
132 for (bank = 0; bank < NR_BANKS; ++bank) {
133 for (block = 0; block < NR_BLOCKS; ++block) {
134 if (block == 0)
135 address = MSR_IA32_MC0_MISC + bank * 4;
136 else if (block == 1) {
137 address = (low & MASK_BLKPTR_LO) >> 21;
138 if (!address)
139 break;
140 address += MCG_XBLK_ADDR;
141 }
142 else
143 ++address;
144
145 if (rdmsr_safe(address, &low, &high))
146 break;
147
148 if (!(high & MASK_VALID_HI)) {
149 if (block)
150 continue;
151 else
152 break;
153 }
154
155 if (!(high & MASK_CNTP_HI) ||
156 (high & MASK_LOCKED_HI))
157 continue;
158
159 if (!block)
160 per_cpu(bank_map, cpu) |= (1 << bank);
161 #ifdef CONFIG_SMP
162 if (shared_bank[bank] && c->cpu_core_id)
163 break;
164 #endif
165 lvt_off = setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR,
166 APIC_EILVT_MSG_FIX, 0);
167
168 high &= ~MASK_LVTOFF_HI;
169 high |= lvt_off << 20;
170 wrmsr(address, low, high);
171
172 threshold_defaults.address = address;
173 tr.b = &threshold_defaults;
174 tr.reset = 0;
175 tr.old_limit = 0;
176 threshold_restart_bank(&tr);
177 }
178 }
179 }
180
181 /*
182 * APIC Interrupt Handler
183 */
184
185 /*
186 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
187 * the interrupt goes off when error_count reaches threshold_limit.
188 * the handler will simply log mcelog w/ software defined bank number.
189 */
mce_threshold_interrupt(void)190 asmlinkage void mce_threshold_interrupt(void)
191 {
192 unsigned int bank, block;
193 struct mce m;
194 u32 low = 0, high = 0, address = 0;
195
196 ack_APIC_irq();
197 exit_idle();
198 irq_enter();
199
200 memset(&m, 0, sizeof(m));
201 rdtscll(m.tsc);
202 m.cpu = smp_processor_id();
203
204 /* assume first bank caused it */
205 for (bank = 0; bank < NR_BANKS; ++bank) {
206 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
207 continue;
208 for (block = 0; block < NR_BLOCKS; ++block) {
209 if (block == 0)
210 address = MSR_IA32_MC0_MISC + bank * 4;
211 else if (block == 1) {
212 address = (low & MASK_BLKPTR_LO) >> 21;
213 if (!address)
214 break;
215 address += MCG_XBLK_ADDR;
216 }
217 else
218 ++address;
219
220 if (rdmsr_safe(address, &low, &high))
221 break;
222
223 if (!(high & MASK_VALID_HI)) {
224 if (block)
225 continue;
226 else
227 break;
228 }
229
230 if (!(high & MASK_CNTP_HI) ||
231 (high & MASK_LOCKED_HI))
232 continue;
233
234 /* Log the machine check that caused the threshold
235 event. */
236 do_machine_check(NULL, 0);
237
238 if (high & MASK_OVERFLOW_HI) {
239 rdmsrl(address, m.misc);
240 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
241 m.status);
242 m.bank = K8_MCE_THRESHOLD_BASE
243 + bank * NR_BLOCKS
244 + block;
245 mce_log(&m);
246 goto out;
247 }
248 }
249 }
250 out:
251 inc_irq_stat(irq_threshold_count);
252 irq_exit();
253 }
254
255 /*
256 * Sysfs Interface
257 */
258
259 struct threshold_attr {
260 struct attribute attr;
261 ssize_t(*show) (struct threshold_block *, char *);
262 ssize_t(*store) (struct threshold_block *, const char *, size_t count);
263 };
264
265 #define SHOW_FIELDS(name) \
266 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
267 { \
268 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
269 }
270 SHOW_FIELDS(interrupt_enable)
SHOW_FIELDS(threshold_limit)271 SHOW_FIELDS(threshold_limit)
272
273 static ssize_t store_interrupt_enable(struct threshold_block *b,
274 const char *buf, size_t count)
275 {
276 char *end;
277 struct thresh_restart tr;
278 unsigned long new = simple_strtoul(buf, &end, 0);
279 if (end == buf)
280 return -EINVAL;
281 b->interrupt_enable = !!new;
282
283 tr.b = b;
284 tr.reset = 0;
285 tr.old_limit = 0;
286 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
287
288 return end - buf;
289 }
290
store_threshold_limit(struct threshold_block * b,const char * buf,size_t count)291 static ssize_t store_threshold_limit(struct threshold_block *b,
292 const char *buf, size_t count)
293 {
294 char *end;
295 struct thresh_restart tr;
296 unsigned long new = simple_strtoul(buf, &end, 0);
297 if (end == buf)
298 return -EINVAL;
299 if (new > THRESHOLD_MAX)
300 new = THRESHOLD_MAX;
301 if (new < 1)
302 new = 1;
303 tr.old_limit = b->threshold_limit;
304 b->threshold_limit = new;
305 tr.b = b;
306 tr.reset = 0;
307
308 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
309
310 return end - buf;
311 }
312
local_error_count(void * _b)313 static long local_error_count(void *_b)
314 {
315 struct threshold_block *b = _b;
316 u32 low, high;
317
318 rdmsr(b->address, low, high);
319 return (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit);
320 }
321
show_error_count(struct threshold_block * b,char * buf)322 static ssize_t show_error_count(struct threshold_block *b, char *buf)
323 {
324 return sprintf(buf, "%lx\n", work_on_cpu(b->cpu, local_error_count, b));
325 }
326
store_error_count(struct threshold_block * b,const char * buf,size_t count)327 static ssize_t store_error_count(struct threshold_block *b,
328 const char *buf, size_t count)
329 {
330 struct thresh_restart tr = { .b = b, .reset = 1, .old_limit = 0 };
331
332 work_on_cpu(b->cpu, threshold_restart_bank, &tr);
333 return 1;
334 }
335
336 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
337 .attr = {.name = __stringify(_name), .mode = _mode }, \
338 .show = _show, \
339 .store = _store, \
340 };
341
342 #define RW_ATTR(name) \
343 static struct threshold_attr name = \
344 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
345
346 RW_ATTR(interrupt_enable);
347 RW_ATTR(threshold_limit);
348 RW_ATTR(error_count);
349
350 static struct attribute *default_attrs[] = {
351 &interrupt_enable.attr,
352 &threshold_limit.attr,
353 &error_count.attr,
354 NULL
355 };
356
357 #define to_block(k) container_of(k, struct threshold_block, kobj)
358 #define to_attr(a) container_of(a, struct threshold_attr, attr)
359
show(struct kobject * kobj,struct attribute * attr,char * buf)360 static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
361 {
362 struct threshold_block *b = to_block(kobj);
363 struct threshold_attr *a = to_attr(attr);
364 ssize_t ret;
365 ret = a->show ? a->show(b, buf) : -EIO;
366 return ret;
367 }
368
store(struct kobject * kobj,struct attribute * attr,const char * buf,size_t count)369 static ssize_t store(struct kobject *kobj, struct attribute *attr,
370 const char *buf, size_t count)
371 {
372 struct threshold_block *b = to_block(kobj);
373 struct threshold_attr *a = to_attr(attr);
374 ssize_t ret;
375 ret = a->store ? a->store(b, buf, count) : -EIO;
376 return ret;
377 }
378
379 static struct sysfs_ops threshold_ops = {
380 .show = show,
381 .store = store,
382 };
383
384 static struct kobj_type threshold_ktype = {
385 .sysfs_ops = &threshold_ops,
386 .default_attrs = default_attrs,
387 };
388
allocate_threshold_blocks(unsigned int cpu,unsigned int bank,unsigned int block,u32 address)389 static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
390 unsigned int bank,
391 unsigned int block,
392 u32 address)
393 {
394 int err;
395 u32 low, high;
396 struct threshold_block *b = NULL;
397
398 if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
399 return 0;
400
401 if (rdmsr_safe(address, &low, &high))
402 return 0;
403
404 if (!(high & MASK_VALID_HI)) {
405 if (block)
406 goto recurse;
407 else
408 return 0;
409 }
410
411 if (!(high & MASK_CNTP_HI) ||
412 (high & MASK_LOCKED_HI))
413 goto recurse;
414
415 b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
416 if (!b)
417 return -ENOMEM;
418
419 b->block = block;
420 b->bank = bank;
421 b->cpu = cpu;
422 b->address = address;
423 b->interrupt_enable = 0;
424 b->threshold_limit = THRESHOLD_MAX;
425
426 INIT_LIST_HEAD(&b->miscj);
427
428 if (per_cpu(threshold_banks, cpu)[bank]->blocks)
429 list_add(&b->miscj,
430 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
431 else
432 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
433
434 err = kobject_init_and_add(&b->kobj, &threshold_ktype,
435 per_cpu(threshold_banks, cpu)[bank]->kobj,
436 "misc%i", block);
437 if (err)
438 goto out_free;
439 recurse:
440 if (!block) {
441 address = (low & MASK_BLKPTR_LO) >> 21;
442 if (!address)
443 return 0;
444 address += MCG_XBLK_ADDR;
445 } else
446 ++address;
447
448 err = allocate_threshold_blocks(cpu, bank, ++block, address);
449 if (err)
450 goto out_free;
451
452 if (b)
453 kobject_uevent(&b->kobj, KOBJ_ADD);
454
455 return err;
456
457 out_free:
458 if (b) {
459 kobject_put(&b->kobj);
460 kfree(b);
461 }
462 return err;
463 }
464
local_allocate_threshold_blocks(void * _bank)465 static __cpuinit long local_allocate_threshold_blocks(void *_bank)
466 {
467 unsigned int *bank = _bank;
468
469 return allocate_threshold_blocks(smp_processor_id(), *bank, 0,
470 MSR_IA32_MC0_MISC + *bank * 4);
471 }
472
473 /* symlinks sibling shared banks to first core. first core owns dir/files. */
threshold_create_bank(unsigned int cpu,unsigned int bank)474 static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
475 {
476 int i, err = 0;
477 struct threshold_bank *b = NULL;
478 char name[32];
479
480 sprintf(name, "threshold_bank%i", bank);
481
482 #ifdef CONFIG_SMP
483 if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
484 i = first_cpu(per_cpu(cpu_core_map, cpu));
485
486 /* first core not up yet */
487 if (cpu_data(i).cpu_core_id)
488 goto out;
489
490 /* already linked */
491 if (per_cpu(threshold_banks, cpu)[bank])
492 goto out;
493
494 b = per_cpu(threshold_banks, i)[bank];
495
496 if (!b)
497 goto out;
498
499 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
500 b->kobj, name);
501 if (err)
502 goto out;
503
504 b->cpus = per_cpu(cpu_core_map, cpu);
505 per_cpu(threshold_banks, cpu)[bank] = b;
506 goto out;
507 }
508 #endif
509
510 b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
511 if (!b) {
512 err = -ENOMEM;
513 goto out;
514 }
515
516 b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
517 if (!b->kobj)
518 goto out_free;
519
520 #ifndef CONFIG_SMP
521 b->cpus = CPU_MASK_ALL;
522 #else
523 b->cpus = per_cpu(cpu_core_map, cpu);
524 #endif
525
526 per_cpu(threshold_banks, cpu)[bank] = b;
527
528 err = work_on_cpu(cpu, local_allocate_threshold_blocks, &bank);
529 if (err)
530 goto out_free;
531
532 for_each_cpu_mask_nr(i, b->cpus) {
533 if (i == cpu)
534 continue;
535
536 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
537 b->kobj, name);
538 if (err)
539 goto out;
540
541 per_cpu(threshold_banks, i)[bank] = b;
542 }
543
544 goto out;
545
546 out_free:
547 per_cpu(threshold_banks, cpu)[bank] = NULL;
548 kfree(b);
549 out:
550 return err;
551 }
552
553 /* create dir/files for all valid threshold banks */
threshold_create_device(unsigned int cpu)554 static __cpuinit int threshold_create_device(unsigned int cpu)
555 {
556 unsigned int bank;
557 int err = 0;
558
559 for (bank = 0; bank < NR_BANKS; ++bank) {
560 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
561 continue;
562 err = threshold_create_bank(cpu, bank);
563 if (err)
564 goto out;
565 }
566 out:
567 return err;
568 }
569
570 /*
571 * let's be hotplug friendly.
572 * in case of multiple core processors, the first core always takes ownership
573 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
574 */
575
deallocate_threshold_block(unsigned int cpu,unsigned int bank)576 static void deallocate_threshold_block(unsigned int cpu,
577 unsigned int bank)
578 {
579 struct threshold_block *pos = NULL;
580 struct threshold_block *tmp = NULL;
581 struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
582
583 if (!head)
584 return;
585
586 list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
587 kobject_put(&pos->kobj);
588 list_del(&pos->miscj);
589 kfree(pos);
590 }
591
592 kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
593 per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
594 }
595
threshold_remove_bank(unsigned int cpu,int bank)596 static void threshold_remove_bank(unsigned int cpu, int bank)
597 {
598 int i = 0;
599 struct threshold_bank *b;
600 char name[32];
601
602 b = per_cpu(threshold_banks, cpu)[bank];
603
604 if (!b)
605 return;
606
607 if (!b->blocks)
608 goto free_out;
609
610 sprintf(name, "threshold_bank%i", bank);
611
612 #ifdef CONFIG_SMP
613 /* sibling symlink */
614 if (shared_bank[bank] && b->blocks->cpu != cpu) {
615 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
616 per_cpu(threshold_banks, cpu)[bank] = NULL;
617 return;
618 }
619 #endif
620
621 /* remove all sibling symlinks before unregistering */
622 for_each_cpu_mask_nr(i, b->cpus) {
623 if (i == cpu)
624 continue;
625
626 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
627 per_cpu(threshold_banks, i)[bank] = NULL;
628 }
629
630 deallocate_threshold_block(cpu, bank);
631
632 free_out:
633 kobject_del(b->kobj);
634 kobject_put(b->kobj);
635 kfree(b);
636 per_cpu(threshold_banks, cpu)[bank] = NULL;
637 }
638
threshold_remove_device(unsigned int cpu)639 static void threshold_remove_device(unsigned int cpu)
640 {
641 unsigned int bank;
642
643 for (bank = 0; bank < NR_BANKS; ++bank) {
644 if (!(per_cpu(bank_map, cpu) & (1 << bank)))
645 continue;
646 threshold_remove_bank(cpu, bank);
647 }
648 }
649
650 /* get notified when a cpu comes on/off */
amd_64_threshold_cpu_callback(unsigned long action,unsigned int cpu)651 static void __cpuinit amd_64_threshold_cpu_callback(unsigned long action,
652 unsigned int cpu)
653 {
654 if (cpu >= NR_CPUS)
655 return;
656
657 switch (action) {
658 case CPU_ONLINE:
659 case CPU_ONLINE_FROZEN:
660 threshold_create_device(cpu);
661 break;
662 case CPU_DEAD:
663 case CPU_DEAD_FROZEN:
664 threshold_remove_device(cpu);
665 break;
666 default:
667 break;
668 }
669 }
670
threshold_init_device(void)671 static __init int threshold_init_device(void)
672 {
673 unsigned lcpu = 0;
674
675 /* to hit CPUs online before the notifier is up */
676 for_each_online_cpu(lcpu) {
677 int err = threshold_create_device(lcpu);
678 if (err)
679 return err;
680 }
681 threshold_cpu_callback = amd_64_threshold_cpu_callback;
682 return 0;
683 }
684
685 device_initcall(threshold_init_device);
686