1 /*!***************************************************************************
2 *!
3 *! FILE NAME : ds1302.c
4 *!
5 *! DESCRIPTION: Implements an interface for the DS1302 RTC through Etrax I/O
6 *!
7 *! Functions exported: ds1302_readreg, ds1302_writereg, ds1302_init
8 *!
9 *! ---------------------------------------------------------------------------
10 *!
11 *! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
12 *!
13 *!***************************************************************************/
14
15
16 #include <linux/fs.h>
17 #include <linux/init.h>
18 #include <linux/mm.h>
19 #include <linux/module.h>
20 #include <linux/miscdevice.h>
21 #include <linux/delay.h>
22 #include <linux/bcd.h>
23 #include <linux/capability.h>
24
25 #include <asm/uaccess.h>
26 #include <asm/system.h>
27 #include <arch/svinto.h>
28 #include <asm/io.h>
29 #include <asm/rtc.h>
30 #include <arch/io_interface_mux.h>
31
32 #include "i2c.h"
33
34 #define RTC_MAJOR_NR 121 /* local major, change later */
35
36 static const char ds1302_name[] = "ds1302";
37
38 /* The DS1302 might be connected to different bits on different products.
39 * It has three signals - SDA, SCL and RST. RST and SCL are always outputs,
40 * but SDA can have a selected direction.
41 * For now, only PORT_PB is hardcoded.
42 */
43
44 /* The RST bit may be on either the Generic Port or Port PB. */
45 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
46 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
47 #define TK_RST_DIR(x)
48 #else
49 #define TK_RST_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
50 #define TK_RST_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_RSTBIT, x)
51 #endif
52
53
54 #define TK_SDA_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
55 #define TK_SCL_OUT(x) REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
56
57 #define TK_SDA_IN() ((*R_PORT_PB_READ >> CONFIG_ETRAX_DS1302_SDABIT) & 1)
58 /* 1 is out, 0 is in */
59 #define TK_SDA_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SDABIT, x)
60 #define TK_SCL_DIR(x) REG_SHADOW_SET(R_PORT_PB_DIR, port_pb_dir_shadow, CONFIG_ETRAX_DS1302_SCLBIT, x)
61
62
63 /*
64 * The reason for tempudelay and not udelay is that loops_per_usec
65 * (used in udelay) is not set when functions here are called from time.c
66 */
67
tempudelay(int usecs)68 static void tempudelay(int usecs)
69 {
70 volatile int loops;
71
72 for(loops = usecs * 12; loops > 0; loops--)
73 /* nothing */;
74 }
75
76
77 /* Send 8 bits. */
78 static void
out_byte(unsigned char x)79 out_byte(unsigned char x)
80 {
81 int i;
82 TK_SDA_DIR(1);
83 for (i = 8; i--;) {
84 /* The chip latches incoming bits on the rising edge of SCL. */
85 TK_SCL_OUT(0);
86 TK_SDA_OUT(x & 1);
87 tempudelay(1);
88 TK_SCL_OUT(1);
89 tempudelay(1);
90 x >>= 1;
91 }
92 TK_SDA_DIR(0);
93 }
94
95 static unsigned char
in_byte(void)96 in_byte(void)
97 {
98 unsigned char x = 0;
99 int i;
100
101 /* Read byte. Bits come LSB first, on the falling edge of SCL.
102 * Assume SDA is in input direction already.
103 */
104 TK_SDA_DIR(0);
105
106 for (i = 8; i--;) {
107 TK_SCL_OUT(0);
108 tempudelay(1);
109 x >>= 1;
110 x |= (TK_SDA_IN() << 7);
111 TK_SCL_OUT(1);
112 tempudelay(1);
113 }
114
115 return x;
116 }
117
118 /* Prepares for a transaction by de-activating RST (active-low). */
119
120 static void
start(void)121 start(void)
122 {
123 TK_SCL_OUT(0);
124 tempudelay(1);
125 TK_RST_OUT(0);
126 tempudelay(5);
127 TK_RST_OUT(1);
128 }
129
130 /* Ends a transaction by taking RST active again. */
131
132 static void
stop(void)133 stop(void)
134 {
135 tempudelay(2);
136 TK_RST_OUT(0);
137 }
138
139 /* Enable writing. */
140
141 static void
ds1302_wenable(void)142 ds1302_wenable(void)
143 {
144 start();
145 out_byte(0x8e); /* Write control register */
146 out_byte(0x00); /* Disable write protect bit 7 = 0 */
147 stop();
148 }
149
150 /* Disable writing. */
151
152 static void
ds1302_wdisable(void)153 ds1302_wdisable(void)
154 {
155 start();
156 out_byte(0x8e); /* Write control register */
157 out_byte(0x80); /* Disable write protect bit 7 = 0 */
158 stop();
159 }
160
161
162
163 /* Read a byte from the selected register in the DS1302. */
164
165 unsigned char
ds1302_readreg(int reg)166 ds1302_readreg(int reg)
167 {
168 unsigned char x;
169
170 start();
171 out_byte(0x81 | (reg << 1)); /* read register */
172 x = in_byte();
173 stop();
174
175 return x;
176 }
177
178 /* Write a byte to the selected register. */
179
180 void
ds1302_writereg(int reg,unsigned char val)181 ds1302_writereg(int reg, unsigned char val)
182 {
183 #ifndef CONFIG_ETRAX_RTC_READONLY
184 int do_writereg = 1;
185 #else
186 int do_writereg = 0;
187
188 if (reg == RTC_TRICKLECHARGER)
189 do_writereg = 1;
190 #endif
191
192 if (do_writereg) {
193 ds1302_wenable();
194 start();
195 out_byte(0x80 | (reg << 1)); /* write register */
196 out_byte(val);
197 stop();
198 ds1302_wdisable();
199 }
200 }
201
202 void
get_rtc_time(struct rtc_time * rtc_tm)203 get_rtc_time(struct rtc_time *rtc_tm)
204 {
205 unsigned long flags;
206
207 local_irq_save(flags);
208
209 rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
210 rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
211 rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
212 rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
213 rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
214 rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
215
216 local_irq_restore(flags);
217
218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
224
225 /*
226 * Account for differences between how the RTC uses the values
227 * and how they are defined in a struct rtc_time;
228 */
229
230 if (rtc_tm->tm_year <= 69)
231 rtc_tm->tm_year += 100;
232
233 rtc_tm->tm_mon--;
234 }
235
236 static unsigned char days_in_mo[] =
237 {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
238
239 /* ioctl that supports RTC_RD_TIME and RTC_SET_TIME (read and set time/date). */
240
241 static int
rtc_ioctl(struct inode * inode,struct file * file,unsigned int cmd,unsigned long arg)242 rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
243 unsigned long arg)
244 {
245 unsigned long flags;
246
247 switch(cmd) {
248 case RTC_RD_TIME: /* read the time/date from RTC */
249 {
250 struct rtc_time rtc_tm;
251
252 memset(&rtc_tm, 0, sizeof (struct rtc_time));
253 get_rtc_time(&rtc_tm);
254 if (copy_to_user((struct rtc_time*)arg, &rtc_tm, sizeof(struct rtc_time)))
255 return -EFAULT;
256 return 0;
257 }
258
259 case RTC_SET_TIME: /* set the RTC */
260 {
261 struct rtc_time rtc_tm;
262 unsigned char mon, day, hrs, min, sec, leap_yr;
263 unsigned int yrs;
264
265 if (!capable(CAP_SYS_TIME))
266 return -EPERM;
267
268 if (copy_from_user(&rtc_tm, (struct rtc_time*)arg, sizeof(struct rtc_time)))
269 return -EFAULT;
270
271 yrs = rtc_tm.tm_year + 1900;
272 mon = rtc_tm.tm_mon + 1; /* tm_mon starts at zero */
273 day = rtc_tm.tm_mday;
274 hrs = rtc_tm.tm_hour;
275 min = rtc_tm.tm_min;
276 sec = rtc_tm.tm_sec;
277
278
279 if ((yrs < 1970) || (yrs > 2069))
280 return -EINVAL;
281
282 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400));
283
284 if ((mon > 12) || (day == 0))
285 return -EINVAL;
286
287 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr)))
288 return -EINVAL;
289
290 if ((hrs >= 24) || (min >= 60) || (sec >= 60))
291 return -EINVAL;
292
293 if (yrs >= 2000)
294 yrs -= 2000; /* RTC (0, 1, ... 69) */
295 else
296 yrs -= 1900; /* RTC (70, 71, ... 99) */
297
298 sec = bin2bcd(sec);
299 min = bin2bcd(min);
300 hrs = bin2bcd(hrs);
301 day = bin2bcd(day);
302 mon = bin2bcd(mon);
303 yrs = bin2bcd(yrs);
304
305 local_irq_save(flags);
306 CMOS_WRITE(yrs, RTC_YEAR);
307 CMOS_WRITE(mon, RTC_MONTH);
308 CMOS_WRITE(day, RTC_DAY_OF_MONTH);
309 CMOS_WRITE(hrs, RTC_HOURS);
310 CMOS_WRITE(min, RTC_MINUTES);
311 CMOS_WRITE(sec, RTC_SECONDS);
312 local_irq_restore(flags);
313
314 /* Notice that at this point, the RTC is updated but
315 * the kernel is still running with the old time.
316 * You need to set that separately with settimeofday
317 * or adjtimex.
318 */
319 return 0;
320 }
321
322 case RTC_SET_CHARGE: /* set the RTC TRICKLE CHARGE register */
323 {
324 int tcs_val;
325
326 if (!capable(CAP_SYS_TIME))
327 return -EPERM;
328
329 if(copy_from_user(&tcs_val, (int*)arg, sizeof(int)))
330 return -EFAULT;
331
332 tcs_val = RTC_TCR_PATTERN | (tcs_val & 0x0F);
333 ds1302_writereg(RTC_TRICKLECHARGER, tcs_val);
334 return 0;
335 }
336 case RTC_VL_READ:
337 {
338 /* TODO:
339 * Implement voltage low detection support
340 */
341 printk(KERN_WARNING "DS1302: RTC Voltage Low detection"
342 " is not supported\n");
343 return 0;
344 }
345 case RTC_VL_CLR:
346 {
347 /* TODO:
348 * Nothing to do since Voltage Low detection is not supported
349 */
350 return 0;
351 }
352 default:
353 return -ENOIOCTLCMD;
354 }
355 }
356
357 static void
print_rtc_status(void)358 print_rtc_status(void)
359 {
360 struct rtc_time tm;
361
362 get_rtc_time(&tm);
363
364 /*
365 * There is no way to tell if the luser has the RTC set for local
366 * time or for Universal Standard Time (GMT). Probably local though.
367 */
368
369 printk(KERN_INFO "rtc_time\t: %02d:%02d:%02d\n",
370 tm.tm_hour, tm.tm_min, tm.tm_sec);
371 printk(KERN_INFO "rtc_date\t: %04d-%02d-%02d\n",
372 tm.tm_year + 1900, tm.tm_mon + 1, tm.tm_mday);
373 }
374
375 /* The various file operations we support. */
376
377 static const struct file_operations rtc_fops = {
378 .owner = THIS_MODULE,
379 .ioctl = rtc_ioctl,
380 };
381
382 /* Probe for the chip by writing something to its RAM and try reading it back. */
383
384 #define MAGIC_PATTERN 0x42
385
386 static int __init
ds1302_probe(void)387 ds1302_probe(void)
388 {
389 int retval, res;
390
391 TK_RST_DIR(1);
392 TK_SCL_DIR(1);
393 TK_SDA_DIR(0);
394
395 /* Try to talk to timekeeper. */
396
397 ds1302_wenable();
398 start();
399 out_byte(0xc0); /* write RAM byte 0 */
400 out_byte(MAGIC_PATTERN); /* write something magic */
401 start();
402 out_byte(0xc1); /* read RAM byte 0 */
403
404 if((res = in_byte()) == MAGIC_PATTERN) {
405 stop();
406 ds1302_wdisable();
407 printk(KERN_INFO "%s: RTC found.\n", ds1302_name);
408 printk(KERN_INFO "%s: SDA, SCL, RST on PB%i, PB%i, %s%i\n",
409 ds1302_name,
410 CONFIG_ETRAX_DS1302_SDABIT,
411 CONFIG_ETRAX_DS1302_SCLBIT,
412 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
413 "GENIO",
414 #else
415 "PB",
416 #endif
417 CONFIG_ETRAX_DS1302_RSTBIT);
418 print_rtc_status();
419 retval = 1;
420 } else {
421 stop();
422 retval = 0;
423 }
424
425 return retval;
426 }
427
428
429 /* Just probe for the RTC and register the device to handle the ioctl needed. */
430
431 int __init
ds1302_init(void)432 ds1302_init(void)
433 {
434 #ifdef CONFIG_ETRAX_I2C
435 i2c_init();
436 #endif
437
438 if (!ds1302_probe()) {
439 #ifdef CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT
440 #if CONFIG_ETRAX_DS1302_RSTBIT == 27
441 /*
442 * The only way to set g27 to output is to enable ATA.
443 *
444 * Make sure that R_GEN_CONFIG is setup correct.
445 */
446 /* Allocating the ATA interface will grab almost all
447 * pins in I/O groups a, b, c and d. A consequence of
448 * allocating the ATA interface is that the fixed
449 * interfaces shared RAM, parallel port 0, parallel
450 * port 1, parallel port W, SCSI-8 port 0, SCSI-8 port
451 * 1, SCSI-W, serial port 2, serial port 3,
452 * synchronous serial port 3 and USB port 2 and almost
453 * all GPIO pins on port g cannot be used.
454 */
455 if (cris_request_io_interface(if_ata, "ds1302/ATA")) {
456 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
457 return -1;
458 }
459
460 #elif CONFIG_ETRAX_DS1302_RSTBIT == 0
461 if (cris_io_interface_allocate_pins(if_gpio_grp_a,
462 'g',
463 CONFIG_ETRAX_DS1302_RSTBIT,
464 CONFIG_ETRAX_DS1302_RSTBIT)) {
465 printk(KERN_WARNING "ds1302: Failed to get IO interface\n");
466 return -1;
467 }
468
469 /* Set the direction of this bit to out. */
470 genconfig_shadow = ((genconfig_shadow &
471 ~IO_MASK(R_GEN_CONFIG, g0dir)) |
472 (IO_STATE(R_GEN_CONFIG, g0dir, out)));
473 *R_GEN_CONFIG = genconfig_shadow;
474 #endif
475 if (!ds1302_probe()) {
476 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
477 return -1;
478 }
479 #else
480 printk(KERN_WARNING "%s: RTC not found.\n", ds1302_name);
481 return -1;
482 #endif
483 }
484 /* Initialise trickle charger */
485 ds1302_writereg(RTC_TRICKLECHARGER,
486 RTC_TCR_PATTERN |(CONFIG_ETRAX_DS1302_TRICKLE_CHARGE & 0x0F));
487 /* Start clock by resetting CLOCK_HALT */
488 ds1302_writereg(RTC_SECONDS, (ds1302_readreg(RTC_SECONDS) & 0x7F));
489 return 0;
490 }
491
ds1302_register(void)492 static int __init ds1302_register(void)
493 {
494 ds1302_init();
495 if (register_chrdev(RTC_MAJOR_NR, ds1302_name, &rtc_fops)) {
496 printk(KERN_INFO "%s: unable to get major %d for rtc\n",
497 ds1302_name, RTC_MAJOR_NR);
498 return -1;
499 }
500 return 0;
501
502 }
503
504 module_init(ds1302_register);
505