1 /*
2 * This file is part of linux driver the digital TV devices equipped with B2C2 FlexcopII(b)/III
3 *
4 * flexcop-sram.c - functions for controlling the SRAM.
5 *
6 * see flexcop.c for copyright information.
7 */
8 #include "flexcop.h"
9
flexcop_sram_set_chip(struct flexcop_device * fc,flexcop_sram_type_t type)10 static void flexcop_sram_set_chip (struct flexcop_device *fc, flexcop_sram_type_t type)
11 {
12 flexcop_set_ibi_value(wan_ctrl_reg_71c,sram_chip,type);
13 }
14
flexcop_sram_init(struct flexcop_device * fc)15 int flexcop_sram_init(struct flexcop_device *fc)
16 {
17 switch (fc->rev) {
18 case FLEXCOP_II:
19 case FLEXCOP_IIB:
20 flexcop_sram_set_chip(fc,FC_SRAM_1_32KB);
21 break;
22 case FLEXCOP_III:
23 flexcop_sram_set_chip(fc,FC_SRAM_1_48KB);
24 break;
25 default:
26 return -EINVAL;
27 }
28 return 0;
29 }
30
flexcop_sram_set_dest(struct flexcop_device * fc,flexcop_sram_dest_t dest,flexcop_sram_dest_target_t target)31 int flexcop_sram_set_dest(struct flexcop_device *fc, flexcop_sram_dest_t dest, flexcop_sram_dest_target_t target)
32 {
33 flexcop_ibi_value v;
34
35 v = fc->read_ibi_reg(fc,sram_dest_reg_714);
36
37 if (fc->rev != FLEXCOP_III && target == FC_SRAM_DEST_TARGET_FC3_CA) {
38 err("SRAM destination target to available on FlexCopII(b)\n");
39 return -EINVAL;
40 }
41
42 deb_sram("sram dest: %x target: %x\n",dest, target);
43
44 if (dest & FC_SRAM_DEST_NET)
45 v.sram_dest_reg_714.NET_Dest = target;
46 if (dest & FC_SRAM_DEST_CAI)
47 v.sram_dest_reg_714.CAI_Dest = target;
48 if (dest & FC_SRAM_DEST_CAO)
49 v.sram_dest_reg_714.CAO_Dest = target;
50 if (dest & FC_SRAM_DEST_MEDIA)
51 v.sram_dest_reg_714.MEDIA_Dest = target;
52
53 fc->write_ibi_reg(fc,sram_dest_reg_714,v);
54 udelay(1000); /* TODO delay really necessary */
55
56 return 0;
57 }
58 EXPORT_SYMBOL(flexcop_sram_set_dest);
59
flexcop_wan_set_speed(struct flexcop_device * fc,flexcop_wan_speed_t s)60 void flexcop_wan_set_speed(struct flexcop_device *fc, flexcop_wan_speed_t s)
61 {
62 flexcop_set_ibi_value(wan_ctrl_reg_71c,wan_speed_sig,s);
63 }
64 EXPORT_SYMBOL(flexcop_wan_set_speed);
65
flexcop_sram_ctrl(struct flexcop_device * fc,int usb_wan,int sramdma,int maximumfill)66 void flexcop_sram_ctrl(struct flexcop_device *fc, int usb_wan, int sramdma, int maximumfill)
67 {
68 flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714);
69 v.sram_dest_reg_714.ctrl_usb_wan = usb_wan;
70 v.sram_dest_reg_714.ctrl_sramdma = sramdma;
71 v.sram_dest_reg_714.ctrl_maximumfill = maximumfill;
72 fc->write_ibi_reg(fc,sram_dest_reg_714,v);
73 }
74 EXPORT_SYMBOL(flexcop_sram_ctrl);
75
76 #if 0
77 static void flexcop_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
78 {
79 int i, retries;
80 u32 command;
81
82 for (i = 0; i < len; i++) {
83 command = bank | addr | 0x04000000 | (*buf << 0x10);
84
85 retries = 2;
86
87 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
88 mdelay(1);
89 retries--;
90 };
91
92 if (retries == 0)
93 printk("%s: SRAM timeout\n", __func__);
94
95 write_reg_dw(adapter, 0x700, command);
96
97 buf++;
98 addr++;
99 }
100 }
101
102 static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
103 {
104 int i, retries;
105 u32 command, value;
106
107 for (i = 0; i < len; i++) {
108 command = bank | addr | 0x04008000;
109
110 retries = 10000;
111
112 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
113 mdelay(1);
114 retries--;
115 };
116
117 if (retries == 0)
118 printk("%s: SRAM timeout\n", __func__);
119
120 write_reg_dw(adapter, 0x700, command);
121
122 retries = 10000;
123
124 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
125 mdelay(1);
126 retries--;
127 };
128
129 if (retries == 0)
130 printk("%s: SRAM timeout\n", __func__);
131
132 value = read_reg_dw(adapter, 0x700) >> 0x10;
133
134 *buf = (value & 0xff);
135
136 addr++;
137 buf++;
138 }
139 }
140
141 static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
142 {
143 u32 bank;
144
145 bank = 0;
146
147 if (adapter->dw_sram_type == 0x20000) {
148 bank = (addr & 0x18000) << 0x0d;
149 }
150
151 if (adapter->dw_sram_type == 0x00000) {
152 if ((addr >> 0x0f) == 0)
153 bank = 0x20000000;
154 else
155 bank = 0x10000000;
156 }
157
158 flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
159 }
160
161 static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
162 {
163 u32 bank;
164
165 bank = 0;
166
167 if (adapter->dw_sram_type == 0x20000) {
168 bank = (addr & 0x18000) << 0x0d;
169 }
170
171 if (adapter->dw_sram_type == 0x00000) {
172 if ((addr >> 0x0f) == 0)
173 bank = 0x20000000;
174 else
175 bank = 0x10000000;
176 }
177
178 flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
179 }
180
181 static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
182 {
183 u32 length;
184
185 while (len != 0) {
186 length = len;
187
188 // check if the address range belongs to the same
189 // 32K memory chip. If not, the data is read from
190 // one chip at a time.
191 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
192 length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
193 }
194
195 sram_read_chunk(adapter, addr, buf, length);
196
197 addr = addr + length;
198 buf = buf + length;
199 len = len - length;
200 }
201 }
202
203 static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
204 {
205 u32 length;
206
207 while (len != 0) {
208 length = len;
209
210 // check if the address range belongs to the same
211 // 32K memory chip. If not, the data is written to
212 // one chip at a time.
213 if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
214 length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
215 }
216
217 sram_write_chunk(adapter, addr, buf, length);
218
219 addr = addr + length;
220 buf = buf + length;
221 len = len - length;
222 }
223 }
224
225 static void sram_set_size(struct adapter *adapter, u32 mask)
226 {
227 write_reg_dw(adapter, 0x71c, (mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
228 }
229
230 static void sram_init(struct adapter *adapter)
231 {
232 u32 tmp;
233
234 tmp = read_reg_dw(adapter, 0x71c);
235
236 write_reg_dw(adapter, 0x71c, 1);
237
238 if (read_reg_dw(adapter, 0x71c) != 0) {
239 write_reg_dw(adapter, 0x71c, tmp);
240
241 adapter->dw_sram_type = tmp & 0x30000;
242
243 ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
244
245 } else {
246
247 adapter->dw_sram_type = 0x10000;
248
249 ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
250 }
251
252 /* return value is never used? */
253 /* return adapter->dw_sram_type; */
254 }
255
256 static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
257 {
258 u8 tmp1, tmp2;
259
260 dprintk("%s: mask = %x, addr = %x\n", __func__, mask, addr);
261
262 sram_set_size(adapter, mask);
263 sram_init(adapter);
264
265 tmp2 = 0xa5;
266 tmp1 = 0x4f;
267
268 sram_write(adapter, addr, &tmp2, 1);
269 sram_write(adapter, addr + 4, &tmp1, 1);
270
271 tmp2 = 0;
272
273 mdelay(20);
274
275 sram_read(adapter, addr, &tmp2, 1);
276 sram_read(adapter, addr, &tmp2, 1);
277
278 dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
279
280 if (tmp2 != 0xa5)
281 return 0;
282
283 tmp2 = 0x5a;
284 tmp1 = 0xf4;
285
286 sram_write(adapter, addr, &tmp2, 1);
287 sram_write(adapter, addr + 4, &tmp1, 1);
288
289 tmp2 = 0;
290
291 mdelay(20);
292
293 sram_read(adapter, addr, &tmp2, 1);
294 sram_read(adapter, addr, &tmp2, 1);
295
296 dprintk("%s: wrote 0x5a, read 0x%2x\n", __func__, tmp2);
297
298 if (tmp2 != 0x5a)
299 return 0;
300
301 return 1;
302 }
303
304 static u32 sram_length(struct adapter *adapter)
305 {
306 if (adapter->dw_sram_type == 0x10000)
307 return 32768; // 32K
308 if (adapter->dw_sram_type == 0x00000)
309 return 65536; // 64K
310 if (adapter->dw_sram_type == 0x20000)
311 return 131072; // 128K
312
313 return 32768; // 32K
314 }
315
316 /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
317 - for 128K there are 4x32K chips at bank 0,1,2,3.
318 - for 64K there are 2x32K chips at bank 1,2.
319 - for 32K there is one 32K chip at bank 0.
320
321 FlexCop works only with one bank at a time. The bank is selected
322 by bits 28-29 of the 0x700 register.
323
324 bank 0 covers addresses 0x00000-0x07fff
325 bank 1 covers addresses 0x08000-0x0ffff
326 bank 2 covers addresses 0x10000-0x17fff
327 bank 3 covers addresses 0x18000-0x1ffff
328 */
329
330 static int flexcop_sram_detect(struct flexcop_device *fc)
331 {
332 flexcop_ibi_value r208,r71c_0,vr71c_1;
333
334 r208 = fc->read_ibi_reg(fc, ctrl_208);
335 fc->write_ibi_reg(fc, ctrl_208, ibi_zero);
336
337 r71c_0 = fc->read_ibi_reg(fc, wan_ctrl_reg_71c);
338
339 write_reg_dw(adapter, 0x71c, 1);
340
341 tmp3 = read_reg_dw(adapter, 0x71c);
342
343 dprintk("%s: tmp3 = %x\n", __func__, tmp3);
344
345 write_reg_dw(adapter, 0x71c, tmp2);
346
347 // check for internal SRAM ???
348 tmp3--;
349 if (tmp3 != 0) {
350 sram_set_size(adapter, 0x10000);
351 sram_init(adapter);
352 write_reg_dw(adapter, 0x208, tmp);
353
354 dprintk("%s: sram size = 32K\n", __func__);
355
356 return 32;
357 }
358
359 if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
360 sram_set_size(adapter, 0x20000);
361 sram_init(adapter);
362 write_reg_dw(adapter, 0x208, tmp);
363
364 dprintk("%s: sram size = 128K\n", __func__);
365
366 return 128;
367 }
368
369 if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
370 sram_set_size(adapter, 0x00000);
371 sram_init(adapter);
372 write_reg_dw(adapter, 0x208, tmp);
373
374 dprintk("%s: sram size = 64K\n", __func__);
375
376 return 64;
377 }
378
379 if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
380 sram_set_size(adapter, 0x10000);
381 sram_init(adapter);
382 write_reg_dw(adapter, 0x208, tmp);
383
384 dprintk("%s: sram size = 32K\n", __func__);
385
386 return 32;
387 }
388
389 sram_set_size(adapter, 0x10000);
390 sram_init(adapter);
391 write_reg_dw(adapter, 0x208, tmp);
392
393 dprintk("%s: SRAM detection failed. Set to 32K \n", __func__);
394
395 return 0;
396 }
397
398 static void sll_detect_sram_size(struct adapter *adapter)
399 {
400 sram_detect_for_flex2(adapter);
401 }
402
403 #endif
404