1 /*
2 * PCI handling of I2O controller
3 *
4 * Copyright (C) 1999-2002 Red Hat Software
5 *
6 * Written by Alan Cox, Building Number Three Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * A lot of the I2O message side code from this is taken from the Red
14 * Creek RCPCI45 adapter driver by Red Creek Communications
15 *
16 * Fixes/additions:
17 * Philipp Rumpf
18 * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
19 * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
20 * Deepak Saxena <deepak@plexity.net>
21 * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
22 * Alan Cox <alan@lxorguk.ukuu.org.uk>:
23 * Ported to Linux 2.5.
24 * Markus Lidel <Markus.Lidel@shadowconnect.com>:
25 * Minor fixes for 2.6.
26 * Markus Lidel <Markus.Lidel@shadowconnect.com>:
27 * Support for sysfs included.
28 */
29
30 #include <linux/pci.h>
31 #include <linux/interrupt.h>
32 #include <linux/i2o.h>
33 #include "core.h"
34
35 #define OSM_DESCRIPTION "I2O-subsystem"
36
37 /* PCI device id table for all I2O controllers */
38 static struct pci_device_id __devinitdata i2o_pci_ids[] = {
39 {PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
40 {PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
41 {.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
42 .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
43 {0}
44 };
45
46 /**
47 * i2o_pci_free - Frees the DMA memory for the I2O controller
48 * @c: I2O controller to free
49 *
50 * Remove all allocated DMA memory and unmap memory IO regions. If MTRR
51 * is enabled, also remove it again.
52 */
i2o_pci_free(struct i2o_controller * c)53 static void i2o_pci_free(struct i2o_controller *c)
54 {
55 struct device *dev;
56
57 dev = &c->pdev->dev;
58
59 i2o_dma_free(dev, &c->out_queue);
60 i2o_dma_free(dev, &c->status_block);
61 kfree(c->lct);
62 i2o_dma_free(dev, &c->dlct);
63 i2o_dma_free(dev, &c->hrt);
64 i2o_dma_free(dev, &c->status);
65
66 if (c->raptor && c->in_queue.virt)
67 iounmap(c->in_queue.virt);
68
69 if (c->base.virt)
70 iounmap(c->base.virt);
71
72 pci_release_regions(c->pdev);
73 }
74
75 /**
76 * i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
77 * @c: I2O controller
78 *
79 * Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
80 * IO mappings are also done here. If MTRR is enabled, also do add memory
81 * regions here.
82 *
83 * Returns 0 on success or negative error code on failure.
84 */
i2o_pci_alloc(struct i2o_controller * c)85 static int __devinit i2o_pci_alloc(struct i2o_controller *c)
86 {
87 struct pci_dev *pdev = c->pdev;
88 struct device *dev = &pdev->dev;
89 int i;
90
91 if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
92 printk(KERN_ERR "%s: device already claimed\n", c->name);
93 return -ENODEV;
94 }
95
96 for (i = 0; i < 6; i++) {
97 /* Skip I/O spaces */
98 if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
99 if (!c->base.phys) {
100 c->base.phys = pci_resource_start(pdev, i);
101 c->base.len = pci_resource_len(pdev, i);
102
103 /*
104 * If we know what card it is, set the size
105 * correctly. Code is taken from dpt_i2o.c
106 */
107 if (pdev->device == 0xa501) {
108 if (pdev->subsystem_device >= 0xc032 &&
109 pdev->subsystem_device <= 0xc03b) {
110 if (c->base.len > 0x400000)
111 c->base.len = 0x400000;
112 } else {
113 if (c->base.len > 0x100000)
114 c->base.len = 0x100000;
115 }
116 }
117 if (!c->raptor)
118 break;
119 } else {
120 c->in_queue.phys = pci_resource_start(pdev, i);
121 c->in_queue.len = pci_resource_len(pdev, i);
122 break;
123 }
124 }
125 }
126
127 if (i == 6) {
128 printk(KERN_ERR "%s: I2O controller has no memory regions"
129 " defined.\n", c->name);
130 i2o_pci_free(c);
131 return -EINVAL;
132 }
133
134 /* Map the I2O controller */
135 if (c->raptor) {
136 printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
137 printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
138 (unsigned long)c->base.phys, (unsigned long)c->base.len);
139 printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
140 (unsigned long)c->in_queue.phys,
141 (unsigned long)c->in_queue.len);
142 } else
143 printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
144 c->name, (unsigned long)c->base.phys,
145 (unsigned long)c->base.len);
146
147 c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
148 if (!c->base.virt) {
149 printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
150 i2o_pci_free(c);
151 return -ENOMEM;
152 }
153
154 if (c->raptor) {
155 c->in_queue.virt =
156 ioremap_nocache(c->in_queue.phys, c->in_queue.len);
157 if (!c->in_queue.virt) {
158 printk(KERN_ERR "%s: Unable to map controller.\n",
159 c->name);
160 i2o_pci_free(c);
161 return -ENOMEM;
162 }
163 } else
164 c->in_queue = c->base;
165
166 c->irq_status = c->base.virt + I2O_IRQ_STATUS;
167 c->irq_mask = c->base.virt + I2O_IRQ_MASK;
168 c->in_port = c->base.virt + I2O_IN_PORT;
169 c->out_port = c->base.virt + I2O_OUT_PORT;
170
171 /* Motorola/Freescale chip does not follow spec */
172 if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
173 /* Check if CPU is enabled */
174 if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
175 printk(KERN_INFO "%s: MPC82XX needs CPU running to "
176 "service I2O.\n", c->name);
177 i2o_pci_free(c);
178 return -ENODEV;
179 } else {
180 c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
181 c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
182 c->in_port += I2O_MOTOROLA_PORT_OFFSET;
183 c->out_port += I2O_MOTOROLA_PORT_OFFSET;
184 printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
185 c->name);
186 }
187 }
188
189 if (i2o_dma_alloc(dev, &c->status, 8)) {
190 i2o_pci_free(c);
191 return -ENOMEM;
192 }
193
194 if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
195 i2o_pci_free(c);
196 return -ENOMEM;
197 }
198
199 if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
200 i2o_pci_free(c);
201 return -ENOMEM;
202 }
203
204 if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
205 i2o_pci_free(c);
206 return -ENOMEM;
207 }
208
209 if (i2o_dma_alloc(dev, &c->out_queue,
210 I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
211 sizeof(u32))) {
212 i2o_pci_free(c);
213 return -ENOMEM;
214 }
215
216 pci_set_drvdata(pdev, c);
217
218 return 0;
219 }
220
221 /**
222 * i2o_pci_interrupt - Interrupt handler for I2O controller
223 * @irq: interrupt line
224 * @dev_id: pointer to the I2O controller
225 *
226 * Handle an interrupt from a PCI based I2O controller. This turns out
227 * to be rather simple. We keep the controller pointer in the cookie.
228 */
i2o_pci_interrupt(int irq,void * dev_id)229 static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
230 {
231 struct i2o_controller *c = dev_id;
232 u32 m;
233 irqreturn_t rc = IRQ_NONE;
234
235 while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
236 m = readl(c->out_port);
237 if (m == I2O_QUEUE_EMPTY) {
238 /*
239 * Old 960 steppings had a bug in the I2O unit that
240 * caused the queue to appear empty when it wasn't.
241 */
242 m = readl(c->out_port);
243 if (unlikely(m == I2O_QUEUE_EMPTY))
244 break;
245 }
246
247 /* dispatch it */
248 if (i2o_driver_dispatch(c, m))
249 /* flush it if result != 0 */
250 i2o_flush_reply(c, m);
251
252 rc = IRQ_HANDLED;
253 }
254
255 return rc;
256 }
257
258 /**
259 * i2o_pci_irq_enable - Allocate interrupt for I2O controller
260 * @c: i2o_controller that the request is for
261 *
262 * Allocate an interrupt for the I2O controller, and activate interrupts
263 * on the I2O controller.
264 *
265 * Returns 0 on success or negative error code on failure.
266 */
i2o_pci_irq_enable(struct i2o_controller * c)267 static int i2o_pci_irq_enable(struct i2o_controller *c)
268 {
269 struct pci_dev *pdev = c->pdev;
270 int rc;
271
272 writel(0xffffffff, c->irq_mask);
273
274 if (pdev->irq) {
275 rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
276 c->name, c);
277 if (rc < 0) {
278 printk(KERN_ERR "%s: unable to allocate interrupt %d."
279 "\n", c->name, pdev->irq);
280 return rc;
281 }
282 }
283
284 writel(0x00000000, c->irq_mask);
285
286 printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
287
288 return 0;
289 }
290
291 /**
292 * i2o_pci_irq_disable - Free interrupt for I2O controller
293 * @c: I2O controller
294 *
295 * Disable interrupts in I2O controller and then free interrupt.
296 */
i2o_pci_irq_disable(struct i2o_controller * c)297 static void i2o_pci_irq_disable(struct i2o_controller *c)
298 {
299 writel(0xffffffff, c->irq_mask);
300
301 if (c->pdev->irq > 0)
302 free_irq(c->pdev->irq, c);
303 }
304
305 /**
306 * i2o_pci_probe - Probe the PCI device for an I2O controller
307 * @pdev: PCI device to test
308 * @id: id which matched with the PCI device id table
309 *
310 * Probe the PCI device for any device which is a memory of the
311 * Intelligent, I2O class or an Adaptec Zero Channel Controller. We
312 * attempt to set up each such device and register it with the core.
313 *
314 * Returns 0 on success or negative error code on failure.
315 */
i2o_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)316 static int __devinit i2o_pci_probe(struct pci_dev *pdev,
317 const struct pci_device_id *id)
318 {
319 struct i2o_controller *c;
320 int rc;
321 struct pci_dev *i960 = NULL;
322
323 printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
324
325 if ((pdev->class & 0xff) > 1) {
326 printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
327 "(skipping).\n", pci_name(pdev));
328 return -ENODEV;
329 }
330
331 if ((rc = pci_enable_device(pdev))) {
332 printk(KERN_WARNING "i2o: couldn't enable device %s\n",
333 pci_name(pdev));
334 return rc;
335 }
336
337 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
338 printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
339 pci_name(pdev));
340 rc = -ENODEV;
341 goto disable;
342 }
343
344 pci_set_master(pdev);
345
346 c = i2o_iop_alloc();
347 if (IS_ERR(c)) {
348 printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
349 pci_name(pdev));
350 rc = PTR_ERR(c);
351 goto disable;
352 } else
353 printk(KERN_INFO "%s: controller found (%s)\n", c->name,
354 pci_name(pdev));
355
356 c->pdev = pdev;
357 c->device.parent = &pdev->dev;
358
359 /* Cards that fall apart if you hit them with large I/O loads... */
360 if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
361 c->short_req = 1;
362 printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
363 c->name);
364 }
365
366 if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
367 /*
368 * Expose the ship behind i960 for initialization, or it will
369 * failed
370 */
371 i960 = pci_get_slot(c->pdev->bus,
372 PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
373
374 if (i960) {
375 pci_write_config_word(i960, 0x42, 0);
376 pci_dev_put(i960);
377 }
378
379 c->promise = 1;
380 c->limit_sectors = 1;
381 }
382
383 if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
384 c->adaptec = 1;
385
386 /* Cards that go bananas if you quiesce them before you reset them. */
387 if (pdev->vendor == PCI_VENDOR_ID_DPT) {
388 c->no_quiesce = 1;
389 if (pdev->device == 0xa511)
390 c->raptor = 1;
391
392 if (pdev->subsystem_device == 0xc05a) {
393 c->limit_sectors = 1;
394 printk(KERN_INFO
395 "%s: limit sectors per request to %d\n", c->name,
396 I2O_MAX_SECTORS_LIMITED);
397 }
398 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
399 if (sizeof(dma_addr_t) > 4) {
400 if (pci_set_dma_mask(pdev, DMA_64BIT_MASK))
401 printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
402 c->name);
403 else {
404 c->pae_support = 1;
405 printk(KERN_INFO "%s: using 64-bit DMA\n",
406 c->name);
407 }
408 }
409 #endif
410 }
411
412 if ((rc = i2o_pci_alloc(c))) {
413 printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
414 "failed\n", c->name);
415 goto free_controller;
416 }
417
418 if (i2o_pci_irq_enable(c)) {
419 printk(KERN_ERR "%s: unable to enable interrupts for I2O "
420 "controller\n", c->name);
421 goto free_pci;
422 }
423
424 if ((rc = i2o_iop_add(c)))
425 goto uninstall;
426
427 if (i960)
428 pci_write_config_word(i960, 0x42, 0x03ff);
429
430 return 0;
431
432 uninstall:
433 i2o_pci_irq_disable(c);
434
435 free_pci:
436 i2o_pci_free(c);
437
438 free_controller:
439 i2o_iop_free(c);
440
441 disable:
442 pci_disable_device(pdev);
443
444 return rc;
445 }
446
447 /**
448 * i2o_pci_remove - Removes a I2O controller from the system
449 * @pdev: I2O controller which should be removed
450 *
451 * Reset the I2O controller, disable interrupts and remove all allocated
452 * resources.
453 */
i2o_pci_remove(struct pci_dev * pdev)454 static void __devexit i2o_pci_remove(struct pci_dev *pdev)
455 {
456 struct i2o_controller *c;
457 c = pci_get_drvdata(pdev);
458
459 i2o_iop_remove(c);
460 i2o_pci_irq_disable(c);
461 i2o_pci_free(c);
462
463 pci_disable_device(pdev);
464
465 printk(KERN_INFO "%s: Controller removed.\n", c->name);
466
467 put_device(&c->device);
468 };
469
470 /* PCI driver for I2O controller */
471 static struct pci_driver i2o_pci_driver = {
472 .name = "PCI_I2O",
473 .id_table = i2o_pci_ids,
474 .probe = i2o_pci_probe,
475 .remove = __devexit_p(i2o_pci_remove),
476 };
477
478 /**
479 * i2o_pci_init - registers I2O PCI driver in PCI subsystem
480 *
481 * Returns > 0 on success or negative error code on failure.
482 */
i2o_pci_init(void)483 int __init i2o_pci_init(void)
484 {
485 return pci_register_driver(&i2o_pci_driver);
486 };
487
488 /**
489 * i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
490 */
i2o_pci_exit(void)491 void __exit i2o_pci_exit(void)
492 {
493 pci_unregister_driver(&i2o_pci_driver);
494 };
495
496 MODULE_DEVICE_TABLE(pci, i2o_pci_ids);
497