1 /*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34 #include <linux/netdevice.h>
35 #include <linux/delay.h>
36 #include "netxen_nic.h"
37 #include "netxen_nic_hw.h"
38 #include "netxen_nic_phan_reg.h"
39
40 struct crb_addr_pair {
41 u32 addr;
42 u32 data;
43 };
44
45 #define NETXEN_MAX_CRB_XFORM 60
46 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
47 #define NETXEN_ADDR_ERROR (0xffffffff)
48
49 #define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
53 #define NETXEN_NIC_XDMA_RESET 0x8000ff
54
55 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
56 uint32_t ctx, uint32_t ringid);
57
58 #if 0
59 static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
60 unsigned long off, int *data)
61 {
62 void __iomem *addr = pci_base_offset(adapter, off);
63 writel(*data, addr);
64 }
65 #endif /* 0 */
66
crb_addr_transform_setup(void)67 static void crb_addr_transform_setup(void)
68 {
69 crb_addr_transform(XDMA);
70 crb_addr_transform(TIMR);
71 crb_addr_transform(SRE);
72 crb_addr_transform(SQN3);
73 crb_addr_transform(SQN2);
74 crb_addr_transform(SQN1);
75 crb_addr_transform(SQN0);
76 crb_addr_transform(SQS3);
77 crb_addr_transform(SQS2);
78 crb_addr_transform(SQS1);
79 crb_addr_transform(SQS0);
80 crb_addr_transform(RPMX7);
81 crb_addr_transform(RPMX6);
82 crb_addr_transform(RPMX5);
83 crb_addr_transform(RPMX4);
84 crb_addr_transform(RPMX3);
85 crb_addr_transform(RPMX2);
86 crb_addr_transform(RPMX1);
87 crb_addr_transform(RPMX0);
88 crb_addr_transform(ROMUSB);
89 crb_addr_transform(SN);
90 crb_addr_transform(QMN);
91 crb_addr_transform(QMS);
92 crb_addr_transform(PGNI);
93 crb_addr_transform(PGND);
94 crb_addr_transform(PGN3);
95 crb_addr_transform(PGN2);
96 crb_addr_transform(PGN1);
97 crb_addr_transform(PGN0);
98 crb_addr_transform(PGSI);
99 crb_addr_transform(PGSD);
100 crb_addr_transform(PGS3);
101 crb_addr_transform(PGS2);
102 crb_addr_transform(PGS1);
103 crb_addr_transform(PGS0);
104 crb_addr_transform(PS);
105 crb_addr_transform(PH);
106 crb_addr_transform(NIU);
107 crb_addr_transform(I2Q);
108 crb_addr_transform(EG);
109 crb_addr_transform(MN);
110 crb_addr_transform(MS);
111 crb_addr_transform(CAS2);
112 crb_addr_transform(CAS1);
113 crb_addr_transform(CAS0);
114 crb_addr_transform(CAM);
115 crb_addr_transform(C2C1);
116 crb_addr_transform(C2C0);
117 crb_addr_transform(SMB);
118 crb_addr_transform(OCM0);
119 crb_addr_transform(I2C0);
120 }
121
netxen_init_firmware(struct netxen_adapter * adapter)122 int netxen_init_firmware(struct netxen_adapter *adapter)
123 {
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
127 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
133 msleep(1);
134 /* Window 1 call */
135 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
146 adapter->pci_write_normalize(adapter,
147 CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
148 adapter->pci_write_normalize(adapter,
149 CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
150 adapter->pci_write_normalize(adapter,
151 CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
152 adapter->pci_write_normalize(adapter,
153 CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
154
155 return err;
156 }
157
netxen_release_rx_buffers(struct netxen_adapter * adapter)158 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
159 {
160 struct netxen_recv_context *recv_ctx;
161 struct nx_host_rds_ring *rds_ring;
162 struct netxen_rx_buffer *rx_buf;
163 int i, ctxid, ring;
164
165 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
166 recv_ctx = &adapter->recv_ctx[ctxid];
167 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
168 rds_ring = &recv_ctx->rds_rings[ring];
169 for (i = 0; i < rds_ring->max_rx_desc_count; ++i) {
170 rx_buf = &(rds_ring->rx_buf_arr[i]);
171 if (rx_buf->state == NETXEN_BUFFER_FREE)
172 continue;
173 pci_unmap_single(adapter->pdev,
174 rx_buf->dma,
175 rds_ring->dma_size,
176 PCI_DMA_FROMDEVICE);
177 if (rx_buf->skb != NULL)
178 dev_kfree_skb_any(rx_buf->skb);
179 }
180 }
181 }
182 }
183
netxen_release_tx_buffers(struct netxen_adapter * adapter)184 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
185 {
186 struct netxen_cmd_buffer *cmd_buf;
187 struct netxen_skb_frag *buffrag;
188 int i, j;
189
190 cmd_buf = adapter->cmd_buf_arr;
191 for (i = 0; i < adapter->max_tx_desc_count; i++) {
192 buffrag = cmd_buf->frag_array;
193 if (buffrag->dma) {
194 pci_unmap_single(adapter->pdev, buffrag->dma,
195 buffrag->length, PCI_DMA_TODEVICE);
196 buffrag->dma = 0ULL;
197 }
198 for (j = 0; j < cmd_buf->frag_count; j++) {
199 buffrag++;
200 if (buffrag->dma) {
201 pci_unmap_page(adapter->pdev, buffrag->dma,
202 buffrag->length,
203 PCI_DMA_TODEVICE);
204 buffrag->dma = 0ULL;
205 }
206 }
207 /* Free the skb we received in netxen_nic_xmit_frame */
208 if (cmd_buf->skb) {
209 dev_kfree_skb_any(cmd_buf->skb);
210 cmd_buf->skb = NULL;
211 }
212 cmd_buf++;
213 }
214 }
215
netxen_free_sw_resources(struct netxen_adapter * adapter)216 void netxen_free_sw_resources(struct netxen_adapter *adapter)
217 {
218 struct netxen_recv_context *recv_ctx;
219 struct nx_host_rds_ring *rds_ring;
220 int ctx, ring;
221
222 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
223 recv_ctx = &adapter->recv_ctx[ctx];
224 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
225 rds_ring = &recv_ctx->rds_rings[ring];
226 if (rds_ring->rx_buf_arr) {
227 vfree(rds_ring->rx_buf_arr);
228 rds_ring->rx_buf_arr = NULL;
229 }
230 }
231 }
232 if (adapter->cmd_buf_arr)
233 vfree(adapter->cmd_buf_arr);
234 return;
235 }
236
netxen_alloc_sw_resources(struct netxen_adapter * adapter)237 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
238 {
239 struct netxen_recv_context *recv_ctx;
240 struct nx_host_rds_ring *rds_ring;
241 struct netxen_rx_buffer *rx_buf;
242 int ctx, ring, i, num_rx_bufs;
243
244 struct netxen_cmd_buffer *cmd_buf_arr;
245 struct net_device *netdev = adapter->netdev;
246
247 cmd_buf_arr = (struct netxen_cmd_buffer *)vmalloc(TX_RINGSIZE);
248 if (cmd_buf_arr == NULL) {
249 printk(KERN_ERR "%s: Failed to allocate cmd buffer ring\n",
250 netdev->name);
251 return -ENOMEM;
252 }
253 memset(cmd_buf_arr, 0, TX_RINGSIZE);
254 adapter->cmd_buf_arr = cmd_buf_arr;
255
256 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
257 recv_ctx = &adapter->recv_ctx[ctx];
258 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
259 rds_ring = &recv_ctx->rds_rings[ring];
260 switch (RCV_DESC_TYPE(ring)) {
261 case RCV_DESC_NORMAL:
262 rds_ring->max_rx_desc_count =
263 adapter->max_rx_desc_count;
264 rds_ring->flags = RCV_DESC_NORMAL;
265 if (adapter->ahw.cut_through) {
266 rds_ring->dma_size =
267 NX_CT_DEFAULT_RX_BUF_LEN;
268 rds_ring->skb_size =
269 NX_CT_DEFAULT_RX_BUF_LEN;
270 } else {
271 rds_ring->dma_size = RX_DMA_MAP_LEN;
272 rds_ring->skb_size =
273 MAX_RX_BUFFER_LENGTH;
274 }
275 break;
276
277 case RCV_DESC_JUMBO:
278 rds_ring->max_rx_desc_count =
279 adapter->max_jumbo_rx_desc_count;
280 rds_ring->flags = RCV_DESC_JUMBO;
281 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
282 rds_ring->dma_size =
283 NX_P3_RX_JUMBO_BUF_MAX_LEN;
284 else
285 rds_ring->dma_size =
286 NX_P2_RX_JUMBO_BUF_MAX_LEN;
287 rds_ring->skb_size =
288 rds_ring->dma_size + NET_IP_ALIGN;
289 break;
290
291 case RCV_RING_LRO:
292 rds_ring->max_rx_desc_count =
293 adapter->max_lro_rx_desc_count;
294 rds_ring->flags = RCV_DESC_LRO;
295 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
296 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
297 break;
298
299 }
300 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
301 vmalloc(RCV_BUFFSIZE);
302 if (rds_ring->rx_buf_arr == NULL) {
303 printk(KERN_ERR "%s: Failed to allocate "
304 "rx buffer ring %d\n",
305 netdev->name, ring);
306 /* free whatever was already allocated */
307 goto err_out;
308 }
309 memset(rds_ring->rx_buf_arr, 0, RCV_BUFFSIZE);
310 INIT_LIST_HEAD(&rds_ring->free_list);
311 /*
312 * Now go through all of them, set reference handles
313 * and put them in the queues.
314 */
315 num_rx_bufs = rds_ring->max_rx_desc_count;
316 rx_buf = rds_ring->rx_buf_arr;
317 for (i = 0; i < num_rx_bufs; i++) {
318 list_add_tail(&rx_buf->list,
319 &rds_ring->free_list);
320 rx_buf->ref_handle = i;
321 rx_buf->state = NETXEN_BUFFER_FREE;
322 rx_buf++;
323 }
324 }
325 }
326
327 return 0;
328
329 err_out:
330 netxen_free_sw_resources(adapter);
331 return -ENOMEM;
332 }
333
netxen_initialize_adapter_ops(struct netxen_adapter * adapter)334 void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
335 {
336 switch (adapter->ahw.board_type) {
337 case NETXEN_NIC_GBE:
338 adapter->enable_phy_interrupts =
339 netxen_niu_gbe_enable_phy_interrupts;
340 adapter->disable_phy_interrupts =
341 netxen_niu_gbe_disable_phy_interrupts;
342 adapter->macaddr_set = netxen_niu_macaddr_set;
343 adapter->set_mtu = netxen_nic_set_mtu_gb;
344 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
345 adapter->phy_read = netxen_niu_gbe_phy_read;
346 adapter->phy_write = netxen_niu_gbe_phy_write;
347 adapter->init_port = netxen_niu_gbe_init_port;
348 adapter->stop_port = netxen_niu_disable_gbe_port;
349 break;
350
351 case NETXEN_NIC_XGBE:
352 adapter->enable_phy_interrupts =
353 netxen_niu_xgbe_enable_phy_interrupts;
354 adapter->disable_phy_interrupts =
355 netxen_niu_xgbe_disable_phy_interrupts;
356 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
357 adapter->set_mtu = netxen_nic_set_mtu_xgb;
358 adapter->init_port = netxen_niu_xg_init_port;
359 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
360 adapter->stop_port = netxen_niu_disable_xg_port;
361 break;
362
363 default:
364 break;
365 }
366
367 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
368 adapter->set_mtu = nx_fw_cmd_set_mtu;
369 adapter->set_promisc = netxen_p3_nic_set_promisc;
370 }
371 }
372
373 /*
374 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
375 * address to external PCI CRB address.
376 */
netxen_decode_crb_addr(u32 addr)377 static u32 netxen_decode_crb_addr(u32 addr)
378 {
379 int i;
380 u32 base_addr, offset, pci_base;
381
382 crb_addr_transform_setup();
383
384 pci_base = NETXEN_ADDR_ERROR;
385 base_addr = addr & 0xfff00000;
386 offset = addr & 0x000fffff;
387
388 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
389 if (crb_addr_xform[i] == base_addr) {
390 pci_base = i << 20;
391 break;
392 }
393 }
394 if (pci_base == NETXEN_ADDR_ERROR)
395 return pci_base;
396 else
397 return (pci_base + offset);
398 }
399
400 static long rom_max_timeout = 100;
401 static long rom_lock_timeout = 10000;
402 #if 0
403 static long rom_write_timeout = 700;
404 #endif
405
rom_lock(struct netxen_adapter * adapter)406 static int rom_lock(struct netxen_adapter *adapter)
407 {
408 int iter;
409 u32 done = 0;
410 int timeout = 0;
411
412 while (!done) {
413 /* acquire semaphore2 from PCI HW block */
414 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
415 &done);
416 if (done == 1)
417 break;
418 if (timeout >= rom_lock_timeout)
419 return -EIO;
420
421 timeout++;
422 /*
423 * Yield CPU
424 */
425 if (!in_atomic())
426 schedule();
427 else {
428 for (iter = 0; iter < 20; iter++)
429 cpu_relax(); /*This a nop instr on i386 */
430 }
431 }
432 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
433 return 0;
434 }
435
netxen_wait_rom_done(struct netxen_adapter * adapter)436 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
437 {
438 long timeout = 0;
439 long done = 0;
440
441 cond_resched();
442
443 while (done == 0) {
444 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
445 done &= 2;
446 timeout++;
447 if (timeout >= rom_max_timeout) {
448 printk("Timeout reached waiting for rom done");
449 return -EIO;
450 }
451 }
452 return 0;
453 }
454
455 #if 0
456 static int netxen_rom_wren(struct netxen_adapter *adapter)
457 {
458 /* Set write enable latch in ROM status register */
459 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
460 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
461 M25P_INSTR_WREN);
462 if (netxen_wait_rom_done(adapter)) {
463 return -1;
464 }
465 return 0;
466 }
467
468 static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
469 unsigned int addr)
470 {
471 unsigned int data = 0xdeaddead;
472 data = netxen_nic_reg_read(adapter, addr);
473 return data;
474 }
475
476 static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
477 {
478 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
479 M25P_INSTR_RDSR);
480 if (netxen_wait_rom_done(adapter)) {
481 return -1;
482 }
483 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
484 }
485 #endif
486
netxen_rom_unlock(struct netxen_adapter * adapter)487 static void netxen_rom_unlock(struct netxen_adapter *adapter)
488 {
489 u32 val;
490
491 /* release semaphore2 */
492 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
493
494 }
495
496 #if 0
497 static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
498 {
499 long timeout = 0;
500 long wip = 1;
501 int val;
502 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
503 while (wip != 0) {
504 val = netxen_do_rom_rdsr(adapter);
505 wip = val & 1;
506 timeout++;
507 if (timeout > rom_max_timeout) {
508 return -1;
509 }
510 }
511 return 0;
512 }
513
514 static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
515 int data)
516 {
517 if (netxen_rom_wren(adapter)) {
518 return -1;
519 }
520 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
521 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
522 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
523 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
524 M25P_INSTR_PP);
525 if (netxen_wait_rom_done(adapter)) {
526 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
527 return -1;
528 }
529
530 return netxen_rom_wip_poll(adapter);
531 }
532 #endif
533
do_rom_fast_read(struct netxen_adapter * adapter,int addr,int * valp)534 static int do_rom_fast_read(struct netxen_adapter *adapter,
535 int addr, int *valp)
536 {
537 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
538 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
539 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
540 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
541 if (netxen_wait_rom_done(adapter)) {
542 printk("Error waiting for rom done\n");
543 return -EIO;
544 }
545 /* reset abyte_cnt and dummy_byte_cnt */
546 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
547 udelay(10);
548 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
549
550 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
551 return 0;
552 }
553
do_rom_fast_read_words(struct netxen_adapter * adapter,int addr,u8 * bytes,size_t size)554 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
555 u8 *bytes, size_t size)
556 {
557 int addridx;
558 int ret = 0;
559
560 for (addridx = addr; addridx < (addr + size); addridx += 4) {
561 int v;
562 ret = do_rom_fast_read(adapter, addridx, &v);
563 if (ret != 0)
564 break;
565 *(__le32 *)bytes = cpu_to_le32(v);
566 bytes += 4;
567 }
568
569 return ret;
570 }
571
572 int
netxen_rom_fast_read_words(struct netxen_adapter * adapter,int addr,u8 * bytes,size_t size)573 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
574 u8 *bytes, size_t size)
575 {
576 int ret;
577
578 ret = rom_lock(adapter);
579 if (ret < 0)
580 return ret;
581
582 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
583
584 netxen_rom_unlock(adapter);
585 return ret;
586 }
587
netxen_rom_fast_read(struct netxen_adapter * adapter,int addr,int * valp)588 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
589 {
590 int ret;
591
592 if (rom_lock(adapter) != 0)
593 return -EIO;
594
595 ret = do_rom_fast_read(adapter, addr, valp);
596 netxen_rom_unlock(adapter);
597 return ret;
598 }
599
600 #if 0
601 int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
602 {
603 int ret = 0;
604
605 if (rom_lock(adapter) != 0) {
606 return -1;
607 }
608 ret = do_rom_fast_write(adapter, addr, data);
609 netxen_rom_unlock(adapter);
610 return ret;
611 }
612
613 static int do_rom_fast_write_words(struct netxen_adapter *adapter,
614 int addr, u8 *bytes, size_t size)
615 {
616 int addridx = addr;
617 int ret = 0;
618
619 while (addridx < (addr + size)) {
620 int last_attempt = 0;
621 int timeout = 0;
622 int data;
623
624 data = le32_to_cpu((*(__le32*)bytes));
625 ret = do_rom_fast_write(adapter, addridx, data);
626 if (ret < 0)
627 return ret;
628
629 while(1) {
630 int data1;
631
632 ret = do_rom_fast_read(adapter, addridx, &data1);
633 if (ret < 0)
634 return ret;
635
636 if (data1 == data)
637 break;
638
639 if (timeout++ >= rom_write_timeout) {
640 if (last_attempt++ < 4) {
641 ret = do_rom_fast_write(adapter,
642 addridx, data);
643 if (ret < 0)
644 return ret;
645 }
646 else {
647 printk(KERN_INFO "Data write did not "
648 "succeed at address 0x%x\n", addridx);
649 break;
650 }
651 }
652 }
653
654 bytes += 4;
655 addridx += 4;
656 }
657
658 return ret;
659 }
660
661 int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
662 u8 *bytes, size_t size)
663 {
664 int ret = 0;
665
666 ret = rom_lock(adapter);
667 if (ret < 0)
668 return ret;
669
670 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
671 netxen_rom_unlock(adapter);
672
673 return ret;
674 }
675
676 static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
677 {
678 int ret;
679
680 ret = netxen_rom_wren(adapter);
681 if (ret < 0)
682 return ret;
683
684 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
685 netxen_crb_writelit_adapter(adapter,
686 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
687
688 ret = netxen_wait_rom_done(adapter);
689 if (ret < 0)
690 return ret;
691
692 return netxen_rom_wip_poll(adapter);
693 }
694
695 static int netxen_rom_rdsr(struct netxen_adapter *adapter)
696 {
697 int ret;
698
699 ret = rom_lock(adapter);
700 if (ret < 0)
701 return ret;
702
703 ret = netxen_do_rom_rdsr(adapter);
704 netxen_rom_unlock(adapter);
705 return ret;
706 }
707
708 int netxen_backup_crbinit(struct netxen_adapter *adapter)
709 {
710 int ret = FLASH_SUCCESS;
711 int val;
712 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
713
714 if (!buffer)
715 return -ENOMEM;
716 /* unlock sector 63 */
717 val = netxen_rom_rdsr(adapter);
718 val = val & 0xe3;
719 ret = netxen_rom_wrsr(adapter, val);
720 if (ret != FLASH_SUCCESS)
721 goto out_kfree;
722
723 ret = netxen_rom_wip_poll(adapter);
724 if (ret != FLASH_SUCCESS)
725 goto out_kfree;
726
727 /* copy sector 0 to sector 63 */
728 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
729 buffer, NETXEN_FLASH_SECTOR_SIZE);
730 if (ret != FLASH_SUCCESS)
731 goto out_kfree;
732
733 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
734 buffer, NETXEN_FLASH_SECTOR_SIZE);
735 if (ret != FLASH_SUCCESS)
736 goto out_kfree;
737
738 /* lock sector 63 */
739 val = netxen_rom_rdsr(adapter);
740 if (!(val & 0x8)) {
741 val |= (0x1 << 2);
742 /* lock sector 63 */
743 if (netxen_rom_wrsr(adapter, val) == 0) {
744 ret = netxen_rom_wip_poll(adapter);
745 if (ret != FLASH_SUCCESS)
746 goto out_kfree;
747
748 /* lock SR writes */
749 ret = netxen_rom_wip_poll(adapter);
750 if (ret != FLASH_SUCCESS)
751 goto out_kfree;
752 }
753 }
754
755 out_kfree:
756 kfree(buffer);
757 return ret;
758 }
759
760 static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
761 {
762 netxen_rom_wren(adapter);
763 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
764 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
765 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
766 M25P_INSTR_SE);
767 if (netxen_wait_rom_done(adapter)) {
768 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
769 return -1;
770 }
771 return netxen_rom_wip_poll(adapter);
772 }
773
774 static void check_erased_flash(struct netxen_adapter *adapter, int addr)
775 {
776 int i;
777 int val;
778 int count = 0, erased_errors = 0;
779 int range;
780
781 range = (addr == NETXEN_USER_START) ?
782 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
783
784 for (i = addr; i < range; i += 4) {
785 netxen_rom_fast_read(adapter, i, &val);
786 if (val != 0xffffffff)
787 erased_errors++;
788 count++;
789 }
790
791 if (erased_errors)
792 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
793 "for sector address: %x\n", erased_errors, count, addr);
794 }
795
796 int netxen_rom_se(struct netxen_adapter *adapter, int addr)
797 {
798 int ret = 0;
799 if (rom_lock(adapter) != 0) {
800 return -1;
801 }
802 ret = netxen_do_rom_se(adapter, addr);
803 netxen_rom_unlock(adapter);
804 msleep(30);
805 check_erased_flash(adapter, addr);
806
807 return ret;
808 }
809
810 static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
811 int start, int end)
812 {
813 int ret = FLASH_SUCCESS;
814 int i;
815
816 for (i = start; i < end; i++) {
817 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
818 if (ret)
819 break;
820 ret = netxen_rom_wip_poll(adapter);
821 if (ret < 0)
822 return ret;
823 }
824
825 return ret;
826 }
827
828 int
829 netxen_flash_erase_secondary(struct netxen_adapter *adapter)
830 {
831 int ret = FLASH_SUCCESS;
832 int start, end;
833
834 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
835 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
836 ret = netxen_flash_erase_sections(adapter, start, end);
837
838 return ret;
839 }
840
841 int
842 netxen_flash_erase_primary(struct netxen_adapter *adapter)
843 {
844 int ret = FLASH_SUCCESS;
845 int start, end;
846
847 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
848 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
849 ret = netxen_flash_erase_sections(adapter, start, end);
850
851 return ret;
852 }
853
854 void netxen_halt_pegs(struct netxen_adapter *adapter)
855 {
856 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
857 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
858 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
859 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
860 }
861
862 int netxen_flash_unlock(struct netxen_adapter *adapter)
863 {
864 int ret = 0;
865
866 ret = netxen_rom_wrsr(adapter, 0);
867 if (ret < 0)
868 return ret;
869
870 ret = netxen_rom_wren(adapter);
871 if (ret < 0)
872 return ret;
873
874 return ret;
875 }
876 #endif /* 0 */
877
878 #define NETXEN_BOARDTYPE 0x4008
879 #define NETXEN_BOARDNUM 0x400c
880 #define NETXEN_CHIPNUM 0x4010
881
netxen_pinit_from_rom(struct netxen_adapter * adapter,int verbose)882 int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
883 {
884 int addr, val;
885 int i, n, init_delay = 0;
886 struct crb_addr_pair *buf;
887 unsigned offset;
888 u32 off;
889
890 /* resetall */
891 rom_lock(adapter);
892 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
893 0xffffffff);
894 netxen_rom_unlock(adapter);
895
896 if (verbose) {
897 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
898 printk("P2 ROM board type: 0x%08x\n", val);
899 else
900 printk("Could not read board type\n");
901 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
902 printk("P2 ROM board num: 0x%08x\n", val);
903 else
904 printk("Could not read board number\n");
905 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
906 printk("P2 ROM chip num: 0x%08x\n", val);
907 else
908 printk("Could not read chip number\n");
909 }
910
911 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
912 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
913 (n != 0xcafecafe) ||
914 netxen_rom_fast_read(adapter, 4, &n) != 0) {
915 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
916 "n: %08x\n", netxen_nic_driver_name, n);
917 return -EIO;
918 }
919 offset = n & 0xffffU;
920 n = (n >> 16) & 0xffffU;
921 } else {
922 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
923 !(n & 0x80000000)) {
924 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
925 "n: %08x\n", netxen_nic_driver_name, n);
926 return -EIO;
927 }
928 offset = 1;
929 n &= ~0x80000000;
930 }
931
932 if (n < 1024) {
933 if (verbose)
934 printk(KERN_DEBUG "%s: %d CRB init values found"
935 " in ROM.\n", netxen_nic_driver_name, n);
936 } else {
937 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
938 " initialized.\n", __func__, n);
939 return -EIO;
940 }
941
942 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
943 if (buf == NULL) {
944 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
945 netxen_nic_driver_name);
946 return -ENOMEM;
947 }
948 for (i = 0; i < n; i++) {
949 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
950 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
951 kfree(buf);
952 return -EIO;
953 }
954
955 buf[i].addr = addr;
956 buf[i].data = val;
957
958 if (verbose)
959 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
960 netxen_nic_driver_name,
961 (u32)netxen_decode_crb_addr(addr), val);
962 }
963 for (i = 0; i < n; i++) {
964
965 off = netxen_decode_crb_addr(buf[i].addr);
966 if (off == NETXEN_ADDR_ERROR) {
967 printk(KERN_ERR"CRB init value out of range %x\n",
968 buf[i].addr);
969 continue;
970 }
971 off += NETXEN_PCI_CRBSPACE;
972 /* skipping cold reboot MAGIC */
973 if (off == NETXEN_CAM_RAM(0x1fc))
974 continue;
975
976 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
977 /* do not reset PCI */
978 if (off == (ROMUSB_GLB + 0xbc))
979 continue;
980 if (off == (ROMUSB_GLB + 0xa8))
981 continue;
982 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
983 continue;
984 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
985 continue;
986 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
987 continue;
988 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
989 buf[i].data = 0x1020;
990 /* skip the function enable register */
991 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
992 continue;
993 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
994 continue;
995 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
996 continue;
997 }
998
999 if (off == NETXEN_ADDR_ERROR) {
1000 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
1001 netxen_nic_driver_name, buf[i].addr);
1002 continue;
1003 }
1004
1005 init_delay = 1;
1006 /* After writing this register, HW needs time for CRB */
1007 /* to quiet down (else crb_window returns 0xffffffff) */
1008 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
1009 init_delay = 1000;
1010 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1011 /* hold xdma in reset also */
1012 buf[i].data = NETXEN_NIC_XDMA_RESET;
1013 buf[i].data = 0x8000ff;
1014 }
1015 }
1016
1017 adapter->hw_write_wx(adapter, off, &buf[i].data, 4);
1018
1019 msleep(init_delay);
1020 }
1021 kfree(buf);
1022
1023 /* disable_peg_cache_all */
1024
1025 /* unreset_net_cache */
1026 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1027 adapter->hw_read_wx(adapter,
1028 NETXEN_ROMUSB_GLB_SW_RESET, &val, 4);
1029 netxen_crb_writelit_adapter(adapter,
1030 NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
1031 }
1032
1033 /* p2dn replyCount */
1034 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
1035 /* disable_peg_cache 0 */
1036 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
1037 /* disable_peg_cache 1 */
1038 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
1039
1040 /* peg_clr_all */
1041
1042 /* peg_clr 0 */
1043 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
1044 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
1045 /* peg_clr 1 */
1046 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
1047 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
1048 /* peg_clr 2 */
1049 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
1050 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
1051 /* peg_clr 3 */
1052 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
1053 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
1054 return 0;
1055 }
1056
netxen_initialize_adapter_offload(struct netxen_adapter * adapter)1057 int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
1058 {
1059 uint64_t addr;
1060 uint32_t hi;
1061 uint32_t lo;
1062
1063 adapter->dummy_dma.addr =
1064 pci_alloc_consistent(adapter->pdev,
1065 NETXEN_HOST_DUMMY_DMA_SIZE,
1066 &adapter->dummy_dma.phys_addr);
1067 if (adapter->dummy_dma.addr == NULL) {
1068 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
1069 __func__);
1070 return -ENOMEM;
1071 }
1072
1073 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1074 hi = (addr >> 32) & 0xffffffff;
1075 lo = addr & 0xffffffff;
1076
1077 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1078 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
1079
1080 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1081 uint32_t temp = 0;
1082 adapter->hw_write_wx(adapter, CRB_HOST_DUMMY_BUF, &temp, 4);
1083 }
1084
1085 return 0;
1086 }
1087
netxen_free_adapter_offload(struct netxen_adapter * adapter)1088 void netxen_free_adapter_offload(struct netxen_adapter *adapter)
1089 {
1090 int i = 100;
1091
1092 if (!adapter->dummy_dma.addr)
1093 return;
1094
1095 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1096 do {
1097 if (dma_watchdog_shutdown_request(adapter) == 1)
1098 break;
1099 msleep(50);
1100 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
1101 break;
1102 } while (--i);
1103 }
1104
1105 if (i) {
1106 pci_free_consistent(adapter->pdev,
1107 NETXEN_HOST_DUMMY_DMA_SIZE,
1108 adapter->dummy_dma.addr,
1109 adapter->dummy_dma.phys_addr);
1110 adapter->dummy_dma.addr = NULL;
1111 } else {
1112 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
1113 adapter->netdev->name);
1114 }
1115 }
1116
netxen_phantom_init(struct netxen_adapter * adapter,int pegtune_val)1117 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1118 {
1119 u32 val = 0;
1120 int retries = 60;
1121
1122 if (!pegtune_val) {
1123 do {
1124 val = adapter->pci_read_normalize(adapter,
1125 CRB_CMDPEG_STATE);
1126
1127 if (val == PHAN_INITIALIZE_COMPLETE ||
1128 val == PHAN_INITIALIZE_ACK)
1129 return 0;
1130
1131 msleep(500);
1132
1133 } while (--retries);
1134
1135 if (!retries) {
1136 pegtune_val = adapter->pci_read_normalize(adapter,
1137 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
1138 printk(KERN_WARNING "netxen_phantom_init: init failed, "
1139 "pegtune_val=%x\n", pegtune_val);
1140 return -1;
1141 }
1142 }
1143
1144 return 0;
1145 }
1146
netxen_receive_peg_ready(struct netxen_adapter * adapter)1147 int netxen_receive_peg_ready(struct netxen_adapter *adapter)
1148 {
1149 u32 val = 0;
1150 int retries = 2000;
1151
1152 do {
1153 val = adapter->pci_read_normalize(adapter, CRB_RCVPEG_STATE);
1154
1155 if (val == PHAN_PEG_RCV_INITIALIZED)
1156 return 0;
1157
1158 msleep(10);
1159
1160 } while (--retries);
1161
1162 if (!retries) {
1163 printk(KERN_ERR "Receive Peg initialization not "
1164 "complete, state: 0x%x.\n", val);
1165 return -EIO;
1166 }
1167
1168 return 0;
1169 }
1170
netxen_process_rxbuf(struct netxen_adapter * adapter,struct nx_host_rds_ring * rds_ring,u16 index,u16 cksum)1171 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1172 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1173 {
1174 struct netxen_rx_buffer *buffer;
1175 struct sk_buff *skb;
1176
1177 buffer = &rds_ring->rx_buf_arr[index];
1178
1179 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1180 PCI_DMA_FROMDEVICE);
1181
1182 skb = buffer->skb;
1183 if (!skb)
1184 goto no_skb;
1185
1186 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1187 adapter->stats.csummed++;
1188 skb->ip_summed = CHECKSUM_UNNECESSARY;
1189 } else
1190 skb->ip_summed = CHECKSUM_NONE;
1191
1192 skb->dev = adapter->netdev;
1193
1194 buffer->skb = NULL;
1195
1196 no_skb:
1197 buffer->state = NETXEN_BUFFER_FREE;
1198 buffer->lro_current_frags = 0;
1199 buffer->lro_expected_frags = 0;
1200 list_add_tail(&buffer->list, &rds_ring->free_list);
1201 return skb;
1202 }
1203
1204 /*
1205 * netxen_process_rcv() send the received packet to the protocol stack.
1206 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1207 * invoke the routine to send more rx buffers to the Phantom...
1208 */
netxen_process_rcv(struct netxen_adapter * adapter,int ctxid,struct status_desc * desc,struct status_desc * frag_desc)1209 static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
1210 struct status_desc *desc, struct status_desc *frag_desc)
1211 {
1212 struct net_device *netdev = adapter->netdev;
1213 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1214 int index = netxen_get_sts_refhandle(sts_data);
1215 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1216 struct netxen_rx_buffer *buffer;
1217 struct sk_buff *skb;
1218 u32 length = netxen_get_sts_totallength(sts_data);
1219 u32 desc_ctx;
1220 u16 pkt_offset = 0, cksum;
1221 struct nx_host_rds_ring *rds_ring;
1222
1223 desc_ctx = netxen_get_sts_type(sts_data);
1224 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1225 printk("%s: %s Bad Rcv descriptor ring\n",
1226 netxen_nic_driver_name, netdev->name);
1227 return;
1228 }
1229
1230 rds_ring = &recv_ctx->rds_rings[desc_ctx];
1231 if (unlikely(index > rds_ring->max_rx_desc_count)) {
1232 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
1233 index, rds_ring->max_rx_desc_count);
1234 return;
1235 }
1236 buffer = &rds_ring->rx_buf_arr[index];
1237 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1238 buffer->lro_current_frags++;
1239 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1240 buffer->lro_expected_frags =
1241 netxen_get_sts_desc_lro_cnt(desc);
1242 buffer->lro_length = length;
1243 }
1244 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1245 if (buffer->lro_expected_frags != 0) {
1246 printk("LRO: (refhandle:%x) recv frag. "
1247 "wait for last. flags: %x expected:%d "
1248 "have:%d\n", index,
1249 netxen_get_sts_desc_lro_last_frag(desc),
1250 buffer->lro_expected_frags,
1251 buffer->lro_current_frags);
1252 }
1253 return;
1254 }
1255 }
1256
1257 cksum = netxen_get_sts_status(sts_data);
1258
1259 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1260 if (!skb)
1261 return;
1262
1263 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1264 /* True length was only available on the last pkt */
1265 skb_put(skb, buffer->lro_length);
1266 } else {
1267 if (length > rds_ring->skb_size)
1268 skb_put(skb, rds_ring->skb_size);
1269 else
1270 skb_put(skb, length);
1271
1272 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1273 if (pkt_offset)
1274 skb_pull(skb, pkt_offset);
1275 }
1276
1277 skb->protocol = eth_type_trans(skb, netdev);
1278
1279 /*
1280 * rx buffer chaining is disabled, walk and free
1281 * any spurious rx buffer chain.
1282 */
1283 if (frag_desc) {
1284 u16 i, nr_frags = desc->nr_frags;
1285
1286 dev_kfree_skb_any(skb);
1287 for (i = 0; i < nr_frags; i++) {
1288 index = le16_to_cpu(frag_desc->frag_handles[i]);
1289 skb = netxen_process_rxbuf(adapter,
1290 rds_ring, index, cksum);
1291 if (skb)
1292 dev_kfree_skb_any(skb);
1293 }
1294 adapter->stats.rxdropped++;
1295 } else {
1296 netif_receive_skb(skb);
1297
1298 adapter->stats.no_rcv++;
1299 adapter->stats.rxbytes += length;
1300 }
1301 }
1302
1303 /* Process Receive status ring */
netxen_process_rcv_ring(struct netxen_adapter * adapter,int ctxid,int max)1304 u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1305 {
1306 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1307 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
1308 struct status_desc *desc, *frag_desc;
1309 u32 consumer = recv_ctx->status_rx_consumer;
1310 int count = 0, ring;
1311 u64 sts_data;
1312 u16 opcode;
1313
1314 while (count < max) {
1315 desc = &desc_head[consumer];
1316 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
1317 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1318 netxen_get_sts_owner(desc));
1319 break;
1320 }
1321
1322 sts_data = le64_to_cpu(desc->status_desc_data);
1323 opcode = netxen_get_sts_opcode(sts_data);
1324 frag_desc = NULL;
1325 if (opcode == NETXEN_NIC_RXPKT_DESC) {
1326 if (desc->nr_frags) {
1327 consumer = get_next_index(consumer,
1328 adapter->max_rx_desc_count);
1329 frag_desc = &desc_head[consumer];
1330 netxen_set_sts_owner(frag_desc,
1331 STATUS_OWNER_PHANTOM);
1332 }
1333 }
1334
1335 netxen_process_rcv(adapter, ctxid, desc, frag_desc);
1336
1337 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
1338
1339 consumer = get_next_index(consumer,
1340 adapter->max_rx_desc_count);
1341 count++;
1342 }
1343 for (ring = 0; ring < adapter->max_rds_rings; ring++)
1344 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
1345
1346 /* update the consumer index in phantom */
1347 if (count) {
1348 recv_ctx->status_rx_consumer = consumer;
1349
1350 /* Window = 1 */
1351 adapter->pci_write_normalize(adapter,
1352 recv_ctx->crb_sts_consumer, consumer);
1353 }
1354
1355 return count;
1356 }
1357
1358 /* Process Command status ring */
netxen_process_cmd_ring(struct netxen_adapter * adapter)1359 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1360 {
1361 u32 last_consumer, consumer;
1362 int count = 0, i;
1363 struct netxen_cmd_buffer *buffer;
1364 struct pci_dev *pdev = adapter->pdev;
1365 struct net_device *netdev = adapter->netdev;
1366 struct netxen_skb_frag *frag;
1367 int done = 0;
1368
1369 last_consumer = adapter->last_cmd_consumer;
1370 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1371
1372 while (last_consumer != consumer) {
1373 buffer = &adapter->cmd_buf_arr[last_consumer];
1374 if (buffer->skb) {
1375 frag = &buffer->frag_array[0];
1376 pci_unmap_single(pdev, frag->dma, frag->length,
1377 PCI_DMA_TODEVICE);
1378 frag->dma = 0ULL;
1379 for (i = 1; i < buffer->frag_count; i++) {
1380 frag++; /* Get the next frag */
1381 pci_unmap_page(pdev, frag->dma, frag->length,
1382 PCI_DMA_TODEVICE);
1383 frag->dma = 0ULL;
1384 }
1385
1386 adapter->stats.xmitfinished++;
1387 dev_kfree_skb_any(buffer->skb);
1388 buffer->skb = NULL;
1389 }
1390
1391 last_consumer = get_next_index(last_consumer,
1392 adapter->max_tx_desc_count);
1393 if (++count >= MAX_STATUS_HANDLE)
1394 break;
1395 }
1396
1397 if (count) {
1398 adapter->last_cmd_consumer = last_consumer;
1399 smp_mb();
1400 if (netif_queue_stopped(netdev) && netif_running(netdev)) {
1401 netif_tx_lock(netdev);
1402 netif_wake_queue(netdev);
1403 smp_mb();
1404 netif_tx_unlock(netdev);
1405 }
1406 }
1407 /*
1408 * If everything is freed up to consumer then check if the ring is full
1409 * If the ring is full then check if more needs to be freed and
1410 * schedule the call back again.
1411 *
1412 * This happens when there are 2 CPUs. One could be freeing and the
1413 * other filling it. If the ring is full when we get out of here and
1414 * the card has already interrupted the host then the host can miss the
1415 * interrupt.
1416 *
1417 * There is still a possible race condition and the host could miss an
1418 * interrupt. The card has to take care of this.
1419 */
1420 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1421 done = (last_consumer == consumer);
1422
1423 return (done);
1424 }
1425
1426 /*
1427 * netxen_post_rx_buffers puts buffer in the Phantom memory
1428 */
netxen_post_rx_buffers(struct netxen_adapter * adapter,u32 ctx,u32 ringid)1429 void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1430 {
1431 struct pci_dev *pdev = adapter->pdev;
1432 struct sk_buff *skb;
1433 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1434 struct nx_host_rds_ring *rds_ring = NULL;
1435 uint producer;
1436 struct rcv_desc *pdesc;
1437 struct netxen_rx_buffer *buffer;
1438 int count = 0;
1439 netxen_ctx_msg msg = 0;
1440 dma_addr_t dma;
1441 struct list_head *head;
1442
1443 rds_ring = &recv_ctx->rds_rings[ringid];
1444
1445 producer = rds_ring->producer;
1446 head = &rds_ring->free_list;
1447
1448 /* We can start writing rx descriptors into the phantom memory. */
1449 while (!list_empty(head)) {
1450
1451 skb = dev_alloc_skb(rds_ring->skb_size);
1452 if (unlikely(!skb)) {
1453 break;
1454 }
1455
1456 if (!adapter->ahw.cut_through)
1457 skb_reserve(skb, 2);
1458
1459 dma = pci_map_single(pdev, skb->data,
1460 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1461 if (pci_dma_mapping_error(pdev, dma)) {
1462 dev_kfree_skb_any(skb);
1463 break;
1464 }
1465
1466 count++;
1467 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1468 list_del(&buffer->list);
1469
1470 buffer->skb = skb;
1471 buffer->state = NETXEN_BUFFER_BUSY;
1472 buffer->dma = dma;
1473
1474 /* make a rcv descriptor */
1475 pdesc = &rds_ring->desc_head[producer];
1476 pdesc->addr_buffer = cpu_to_le64(dma);
1477 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1478 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1479
1480 producer = get_next_index(producer, rds_ring->max_rx_desc_count);
1481 }
1482 /* if we did allocate buffers, then write the count to Phantom */
1483 if (count) {
1484 rds_ring->producer = producer;
1485 /* Window = 1 */
1486 adapter->pci_write_normalize(adapter,
1487 rds_ring->crb_rcv_producer,
1488 (producer-1) & (rds_ring->max_rx_desc_count-1));
1489
1490 if (adapter->fw_major < 4) {
1491 /*
1492 * Write a doorbell msg to tell phanmon of change in
1493 * receive ring producer
1494 * Only for firmware version < 4.0.0
1495 */
1496 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1497 netxen_set_msg_privid(msg);
1498 netxen_set_msg_count(msg,
1499 ((producer -
1500 1) & (rds_ring->
1501 max_rx_desc_count - 1)));
1502 netxen_set_msg_ctxid(msg, adapter->portnum);
1503 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1504 writel(msg,
1505 DB_NORMALIZE(adapter,
1506 NETXEN_RCV_PRODUCER_OFFSET));
1507 }
1508 }
1509 }
1510
netxen_post_rx_buffers_nodb(struct netxen_adapter * adapter,uint32_t ctx,uint32_t ringid)1511 static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1512 uint32_t ctx, uint32_t ringid)
1513 {
1514 struct pci_dev *pdev = adapter->pdev;
1515 struct sk_buff *skb;
1516 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
1517 struct nx_host_rds_ring *rds_ring = NULL;
1518 u32 producer;
1519 struct rcv_desc *pdesc;
1520 struct netxen_rx_buffer *buffer;
1521 int count = 0;
1522 struct list_head *head;
1523 dma_addr_t dma;
1524
1525 rds_ring = &recv_ctx->rds_rings[ringid];
1526
1527 producer = rds_ring->producer;
1528 head = &rds_ring->free_list;
1529 /* We can start writing rx descriptors into the phantom memory. */
1530 while (!list_empty(head)) {
1531
1532 skb = dev_alloc_skb(rds_ring->skb_size);
1533 if (unlikely(!skb)) {
1534 break;
1535 }
1536
1537 if (!adapter->ahw.cut_through)
1538 skb_reserve(skb, 2);
1539
1540 dma = pci_map_single(pdev, skb->data,
1541 rds_ring->dma_size, PCI_DMA_FROMDEVICE);
1542 if (pci_dma_mapping_error(pdev, dma)) {
1543 dev_kfree_skb_any(skb);
1544 break;
1545 }
1546
1547 count++;
1548 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1549 list_del(&buffer->list);
1550
1551 buffer->skb = skb;
1552 buffer->state = NETXEN_BUFFER_BUSY;
1553 buffer->dma = dma;
1554
1555 /* make a rcv descriptor */
1556 pdesc = &rds_ring->desc_head[producer];
1557 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1558 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1559 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1560
1561 producer = get_next_index(producer, rds_ring->max_rx_desc_count);
1562 }
1563
1564 /* if we did allocate buffers, then write the count to Phantom */
1565 if (count) {
1566 rds_ring->producer = producer;
1567 /* Window = 1 */
1568 adapter->pci_write_normalize(adapter,
1569 rds_ring->crb_rcv_producer,
1570 (producer-1) & (rds_ring->max_rx_desc_count-1));
1571 wmb();
1572 }
1573 }
1574
netxen_nic_clear_stats(struct netxen_adapter * adapter)1575 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1576 {
1577 memset(&adapter->stats, 0, sizeof(adapter->stats));
1578 return;
1579 }
1580
1581