1 #ifndef _ASM_X86_I8259_H 2 #define _ASM_X86_I8259_H 3 4 #include <linux/delay.h> 5 6 extern unsigned int cached_irq_mask; 7 8 #define __byte(x, y) (((unsigned char *)&(y))[x]) 9 #define cached_master_mask (__byte(0, cached_irq_mask)) 10 #define cached_slave_mask (__byte(1, cached_irq_mask)) 11 12 /* i8259A PIC registers */ 13 #define PIC_MASTER_CMD 0x20 14 #define PIC_MASTER_IMR 0x21 15 #define PIC_MASTER_ISR PIC_MASTER_CMD 16 #define PIC_MASTER_POLL PIC_MASTER_ISR 17 #define PIC_MASTER_OCW3 PIC_MASTER_ISR 18 #define PIC_SLAVE_CMD 0xa0 19 #define PIC_SLAVE_IMR 0xa1 20 21 /* i8259A PIC related value */ 22 #define PIC_CASCADE_IR 2 23 #define MASTER_ICW4_DEFAULT 0x01 24 #define SLAVE_ICW4_DEFAULT 0x01 25 #define PIC_ICW4_AEOI 2 26 27 extern spinlock_t i8259A_lock; 28 29 extern void init_8259A(int auto_eoi); 30 extern void enable_8259A_irq(unsigned int irq); 31 extern void disable_8259A_irq(unsigned int irq); 32 extern unsigned int startup_8259A_irq(unsigned int irq); 33 34 /* the PIC may need a careful delay on some platforms, hence specific calls */ inb_pic(unsigned int port)35static inline unsigned char inb_pic(unsigned int port) 36 { 37 unsigned char value = inb(port); 38 39 /* 40 * delay for some accesses to PIC on motherboard or in chipset 41 * must be at least one microsecond, so be safe here: 42 */ 43 udelay(2); 44 45 return value; 46 } 47 outb_pic(unsigned char value,unsigned int port)48static inline void outb_pic(unsigned char value, unsigned int port) 49 { 50 outb(value, port); 51 /* 52 * delay for some accesses to PIC on motherboard or in chipset 53 * must be at least one microsecond, so be safe here: 54 */ 55 udelay(2); 56 } 57 58 extern struct irq_chip i8259A_chip; 59 60 extern void mask_8259A(void); 61 extern void unmask_8259A(void); 62 63 #endif /* _ASM_X86_I8259_H */ 64