1 /*
2 * Low-Level PCI Support for PC
3 *
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
5 */
6
7 #include <linux/sched.h>
8 #include <linux/pci.h>
9 #include <linux/ioport.h>
10 #include <linux/init.h>
11 #include <linux/dmi.h>
12
13 #include <asm/acpi.h>
14 #include <asm/segment.h>
15 #include <asm/io.h>
16 #include <asm/smp.h>
17 #include <asm/pci_x86.h>
18
19 unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
20 PCI_PROBE_MMCONF;
21
22 unsigned int pci_early_dump_regs;
23 static int pci_bf_sort;
24 int pci_routeirq;
25 int noioapicquirk;
26 #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
27 int noioapicreroute = 0;
28 #else
29 int noioapicreroute = 1;
30 #endif
31 int pcibios_last_bus = -1;
32 unsigned long pirq_table_addr;
33 struct pci_bus *pci_root_bus;
34 struct pci_raw_ops *raw_pci_ops;
35 struct pci_raw_ops *raw_pci_ext_ops;
36
raw_pci_read(unsigned int domain,unsigned int bus,unsigned int devfn,int reg,int len,u32 * val)37 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
38 int reg, int len, u32 *val)
39 {
40 if (domain == 0 && reg < 256 && raw_pci_ops)
41 return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
42 if (raw_pci_ext_ops)
43 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
44 return -EINVAL;
45 }
46
raw_pci_write(unsigned int domain,unsigned int bus,unsigned int devfn,int reg,int len,u32 val)47 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
48 int reg, int len, u32 val)
49 {
50 if (domain == 0 && reg < 256 && raw_pci_ops)
51 return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
52 if (raw_pci_ext_ops)
53 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
54 return -EINVAL;
55 }
56
pci_read(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * value)57 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
58 {
59 return raw_pci_read(pci_domain_nr(bus), bus->number,
60 devfn, where, size, value);
61 }
62
pci_write(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 value)63 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
64 {
65 return raw_pci_write(pci_domain_nr(bus), bus->number,
66 devfn, where, size, value);
67 }
68
69 struct pci_ops pci_root_ops = {
70 .read = pci_read,
71 .write = pci_write,
72 };
73
74 /*
75 * legacy, numa, and acpi all want to call pcibios_scan_root
76 * from their initcalls. This flag prevents that.
77 */
78 int pcibios_scanned;
79
80 /*
81 * This interrupt-safe spinlock protects all accesses to PCI
82 * configuration space.
83 */
84 DEFINE_SPINLOCK(pci_config_lock);
85
can_skip_ioresource_align(const struct dmi_system_id * d)86 static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
87 {
88 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
89 printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
90 return 0;
91 }
92
93 static struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitdata = {
94 /*
95 * Systems where PCI IO resource ISA alignment can be skipped
96 * when the ISA enable bit in the bridge control is not set
97 */
98 {
99 .callback = can_skip_ioresource_align,
100 .ident = "IBM System x3800",
101 .matches = {
102 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
103 DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
104 },
105 },
106 {
107 .callback = can_skip_ioresource_align,
108 .ident = "IBM System x3850",
109 .matches = {
110 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
111 DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
112 },
113 },
114 {
115 .callback = can_skip_ioresource_align,
116 .ident = "IBM System x3950",
117 .matches = {
118 DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
119 DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
120 },
121 },
122 {}
123 };
124
dmi_check_skip_isa_align(void)125 void __init dmi_check_skip_isa_align(void)
126 {
127 dmi_check_system(can_skip_pciprobe_dmi_table);
128 }
129
pcibios_fixup_device_resources(struct pci_dev * dev)130 static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
131 {
132 struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
133
134 if (pci_probe & PCI_NOASSIGN_ROMS) {
135 if (rom_r->parent)
136 return;
137 if (rom_r->start) {
138 /* we deal with BIOS assigned ROM later */
139 return;
140 }
141 rom_r->start = rom_r->end = rom_r->flags = 0;
142 }
143 }
144
145 /*
146 * Called after each bus is probed, but before its children
147 * are examined.
148 */
149
pcibios_fixup_bus(struct pci_bus * b)150 void __devinit pcibios_fixup_bus(struct pci_bus *b)
151 {
152 struct pci_dev *dev;
153
154 pci_read_bridge_bases(b);
155 list_for_each_entry(dev, &b->devices, bus_list)
156 pcibios_fixup_device_resources(dev);
157 }
158
159 /*
160 * Only use DMI information to set this if nothing was passed
161 * on the kernel command line (which was parsed earlier).
162 */
163
set_bf_sort(const struct dmi_system_id * d)164 static int __devinit set_bf_sort(const struct dmi_system_id *d)
165 {
166 if (pci_bf_sort == pci_bf_sort_default) {
167 pci_bf_sort = pci_dmi_bf;
168 printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
169 }
170 return 0;
171 }
172
173 /*
174 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
175 */
176 #ifdef __i386__
assign_all_busses(const struct dmi_system_id * d)177 static int __devinit assign_all_busses(const struct dmi_system_id *d)
178 {
179 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
180 printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
181 " (pci=assign-busses)\n", d->ident);
182 return 0;
183 }
184 #endif
185
186 static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
187 #ifdef __i386__
188 /*
189 * Laptops which need pci=assign-busses to see Cardbus cards
190 */
191 {
192 .callback = assign_all_busses,
193 .ident = "Samsung X20 Laptop",
194 .matches = {
195 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
196 DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
197 },
198 },
199 #endif /* __i386__ */
200 {
201 .callback = set_bf_sort,
202 .ident = "Dell PowerEdge 1950",
203 .matches = {
204 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
205 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
206 },
207 },
208 {
209 .callback = set_bf_sort,
210 .ident = "Dell PowerEdge 1955",
211 .matches = {
212 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
213 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
214 },
215 },
216 {
217 .callback = set_bf_sort,
218 .ident = "Dell PowerEdge 2900",
219 .matches = {
220 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
221 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
222 },
223 },
224 {
225 .callback = set_bf_sort,
226 .ident = "Dell PowerEdge 2950",
227 .matches = {
228 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
229 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
230 },
231 },
232 {
233 .callback = set_bf_sort,
234 .ident = "Dell PowerEdge R900",
235 .matches = {
236 DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
237 DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
238 },
239 },
240 {
241 .callback = set_bf_sort,
242 .ident = "HP ProLiant BL20p G3",
243 .matches = {
244 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
245 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
246 },
247 },
248 {
249 .callback = set_bf_sort,
250 .ident = "HP ProLiant BL20p G4",
251 .matches = {
252 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
253 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
254 },
255 },
256 {
257 .callback = set_bf_sort,
258 .ident = "HP ProLiant BL30p G1",
259 .matches = {
260 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
261 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
262 },
263 },
264 {
265 .callback = set_bf_sort,
266 .ident = "HP ProLiant BL25p G1",
267 .matches = {
268 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
269 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
270 },
271 },
272 {
273 .callback = set_bf_sort,
274 .ident = "HP ProLiant BL35p G1",
275 .matches = {
276 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
277 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
278 },
279 },
280 {
281 .callback = set_bf_sort,
282 .ident = "HP ProLiant BL45p G1",
283 .matches = {
284 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
285 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
286 },
287 },
288 {
289 .callback = set_bf_sort,
290 .ident = "HP ProLiant BL45p G2",
291 .matches = {
292 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
293 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
294 },
295 },
296 {
297 .callback = set_bf_sort,
298 .ident = "HP ProLiant BL460c G1",
299 .matches = {
300 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
301 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
302 },
303 },
304 {
305 .callback = set_bf_sort,
306 .ident = "HP ProLiant BL465c G1",
307 .matches = {
308 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
309 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
310 },
311 },
312 {
313 .callback = set_bf_sort,
314 .ident = "HP ProLiant BL480c G1",
315 .matches = {
316 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
317 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
318 },
319 },
320 {
321 .callback = set_bf_sort,
322 .ident = "HP ProLiant BL685c G1",
323 .matches = {
324 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
325 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
326 },
327 },
328 {
329 .callback = set_bf_sort,
330 .ident = "HP ProLiant DL360",
331 .matches = {
332 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
333 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
334 },
335 },
336 {
337 .callback = set_bf_sort,
338 .ident = "HP ProLiant DL380",
339 .matches = {
340 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
341 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
342 },
343 },
344 #ifdef __i386__
345 {
346 .callback = assign_all_busses,
347 .ident = "Compaq EVO N800c",
348 .matches = {
349 DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
350 DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
351 },
352 },
353 #endif
354 {
355 .callback = set_bf_sort,
356 .ident = "HP ProLiant DL385 G2",
357 .matches = {
358 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
359 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
360 },
361 },
362 {
363 .callback = set_bf_sort,
364 .ident = "HP ProLiant DL585 G2",
365 .matches = {
366 DMI_MATCH(DMI_SYS_VENDOR, "HP"),
367 DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
368 },
369 },
370 {}
371 };
372
dmi_check_pciprobe(void)373 void __init dmi_check_pciprobe(void)
374 {
375 dmi_check_system(pciprobe_dmi_table);
376 }
377
pcibios_scan_root(int busnum)378 struct pci_bus * __devinit pcibios_scan_root(int busnum)
379 {
380 struct pci_bus *bus = NULL;
381 struct pci_sysdata *sd;
382
383 while ((bus = pci_find_next_bus(bus)) != NULL) {
384 if (bus->number == busnum) {
385 /* Already scanned */
386 return bus;
387 }
388 }
389
390 /* Allocate per-root-bus (not per bus) arch-specific data.
391 * TODO: leak; this memory is never freed.
392 * It's arguable whether it's worth the trouble to care.
393 */
394 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
395 if (!sd) {
396 printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
397 return NULL;
398 }
399
400 sd->node = get_mp_bus_to_node(busnum);
401
402 printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
403 bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
404 if (!bus)
405 kfree(sd);
406
407 return bus;
408 }
409
410 extern u8 pci_cache_line_size;
411
pcibios_init(void)412 int __init pcibios_init(void)
413 {
414 struct cpuinfo_x86 *c = &boot_cpu_data;
415
416 if (!raw_pci_ops) {
417 printk(KERN_WARNING "PCI: System does not support PCI\n");
418 return 0;
419 }
420
421 /*
422 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
423 * and P4. It's also good for 386/486s (which actually have 16)
424 * as quite a few PCI devices do not support smaller values.
425 */
426 pci_cache_line_size = 32 >> 2;
427 if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
428 pci_cache_line_size = 64 >> 2; /* K7 & K8 */
429 else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
430 pci_cache_line_size = 128 >> 2; /* P4 */
431
432 pcibios_resource_survey();
433
434 if (pci_bf_sort >= pci_force_bf)
435 pci_sort_breadthfirst();
436 return 0;
437 }
438
pcibios_setup(char * str)439 char * __devinit pcibios_setup(char *str)
440 {
441 if (!strcmp(str, "off")) {
442 pci_probe = 0;
443 return NULL;
444 } else if (!strcmp(str, "bfsort")) {
445 pci_bf_sort = pci_force_bf;
446 return NULL;
447 } else if (!strcmp(str, "nobfsort")) {
448 pci_bf_sort = pci_force_nobf;
449 return NULL;
450 }
451 #ifdef CONFIG_PCI_BIOS
452 else if (!strcmp(str, "bios")) {
453 pci_probe = PCI_PROBE_BIOS;
454 return NULL;
455 } else if (!strcmp(str, "nobios")) {
456 pci_probe &= ~PCI_PROBE_BIOS;
457 return NULL;
458 } else if (!strcmp(str, "biosirq")) {
459 pci_probe |= PCI_BIOS_IRQ_SCAN;
460 return NULL;
461 } else if (!strncmp(str, "pirqaddr=", 9)) {
462 pirq_table_addr = simple_strtoul(str+9, NULL, 0);
463 return NULL;
464 }
465 #endif
466 #ifdef CONFIG_PCI_DIRECT
467 else if (!strcmp(str, "conf1")) {
468 pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
469 return NULL;
470 }
471 else if (!strcmp(str, "conf2")) {
472 pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
473 return NULL;
474 }
475 #endif
476 #ifdef CONFIG_PCI_MMCONFIG
477 else if (!strcmp(str, "nommconf")) {
478 pci_probe &= ~PCI_PROBE_MMCONF;
479 return NULL;
480 }
481 else if (!strcmp(str, "check_enable_amd_mmconf")) {
482 pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
483 return NULL;
484 }
485 #endif
486 else if (!strcmp(str, "noacpi")) {
487 acpi_noirq_set();
488 return NULL;
489 }
490 else if (!strcmp(str, "noearly")) {
491 pci_probe |= PCI_PROBE_NOEARLY;
492 return NULL;
493 }
494 #ifndef CONFIG_X86_VISWS
495 else if (!strcmp(str, "usepirqmask")) {
496 pci_probe |= PCI_USE_PIRQ_MASK;
497 return NULL;
498 } else if (!strncmp(str, "irqmask=", 8)) {
499 pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
500 return NULL;
501 } else if (!strncmp(str, "lastbus=", 8)) {
502 pcibios_last_bus = simple_strtol(str+8, NULL, 0);
503 return NULL;
504 }
505 #endif
506 else if (!strcmp(str, "rom")) {
507 pci_probe |= PCI_ASSIGN_ROMS;
508 return NULL;
509 } else if (!strcmp(str, "norom")) {
510 pci_probe |= PCI_NOASSIGN_ROMS;
511 return NULL;
512 } else if (!strcmp(str, "assign-busses")) {
513 pci_probe |= PCI_ASSIGN_ALL_BUSSES;
514 return NULL;
515 } else if (!strcmp(str, "use_crs")) {
516 pci_probe |= PCI_USE__CRS;
517 return NULL;
518 } else if (!strcmp(str, "earlydump")) {
519 pci_early_dump_regs = 1;
520 return NULL;
521 } else if (!strcmp(str, "routeirq")) {
522 pci_routeirq = 1;
523 return NULL;
524 } else if (!strcmp(str, "skip_isa_align")) {
525 pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
526 return NULL;
527 } else if (!strcmp(str, "noioapicquirk")) {
528 noioapicquirk = 1;
529 return NULL;
530 } else if (!strcmp(str, "ioapicreroute")) {
531 if (noioapicreroute != -1)
532 noioapicreroute = 0;
533 return NULL;
534 } else if (!strcmp(str, "noioapicreroute")) {
535 if (noioapicreroute != -1)
536 noioapicreroute = 1;
537 return NULL;
538 }
539 return str;
540 }
541
pcibios_assign_all_busses(void)542 unsigned int pcibios_assign_all_busses(void)
543 {
544 return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
545 }
546
pcibios_enable_device(struct pci_dev * dev,int mask)547 int pcibios_enable_device(struct pci_dev *dev, int mask)
548 {
549 int err;
550
551 if ((err = pci_enable_resources(dev, mask)) < 0)
552 return err;
553
554 if (!pci_dev_msi_enabled(dev))
555 return pcibios_enable_irq(dev);
556 return 0;
557 }
558
pcibios_disable_device(struct pci_dev * dev)559 void pcibios_disable_device (struct pci_dev *dev)
560 {
561 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
562 pcibios_disable_irq(dev);
563 }
564
pci_ext_cfg_avail(struct pci_dev * dev)565 int pci_ext_cfg_avail(struct pci_dev *dev)
566 {
567 if (raw_pci_ext_ops)
568 return 1;
569 else
570 return 0;
571 }
572
pci_scan_bus_on_node(int busno,struct pci_ops * ops,int node)573 struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
574 {
575 struct pci_bus *bus = NULL;
576 struct pci_sysdata *sd;
577
578 /*
579 * Allocate per-root-bus (not per bus) arch-specific data.
580 * TODO: leak; this memory is never freed.
581 * It's arguable whether it's worth the trouble to care.
582 */
583 sd = kzalloc(sizeof(*sd), GFP_KERNEL);
584 if (!sd) {
585 printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
586 return NULL;
587 }
588 sd->node = node;
589 bus = pci_scan_bus(busno, ops, sd);
590 if (!bus)
591 kfree(sd);
592
593 return bus;
594 }
595
pci_scan_bus_with_sysdata(int busno)596 struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
597 {
598 return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
599 }
600