1 /*
2 * pcic.c: MicroSPARC-IIep PCI controller support
3 *
4 * Copyright (C) 1998 V. Roganov and G. Raiko
5 *
6 * Code is derived from Ultra/PCI PSYCHO controller support, see that
7 * for author info.
8 *
9 * Support for diverse IIep based platforms by Pete Zaitcev.
10 * CP-1200 by Eric Brower.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/init.h>
16 #include <linux/mm.h>
17 #include <linux/slab.h>
18 #include <linux/jiffies.h>
19
20 #include <asm/swift.h> /* for cache flushing. */
21 #include <asm/io.h>
22
23 #include <linux/ctype.h>
24 #include <linux/pci.h>
25 #include <linux/time.h>
26 #include <linux/timex.h>
27 #include <linux/interrupt.h>
28
29 #include <asm/irq.h>
30 #include <asm/oplib.h>
31 #include <asm/prom.h>
32 #include <asm/pcic.h>
33 #include <asm/timer.h>
34 #include <asm/uaccess.h>
35 #include <asm/irq_regs.h>
36
37 #include "irq.h"
38
39 /*
40 * I studied different documents and many live PROMs both from 2.30
41 * family and 3.xx versions. I came to the amazing conclusion: there is
42 * absolutely no way to route interrupts in IIep systems relying on
43 * information which PROM presents. We must hardcode interrupt routing
44 * schematics. And this actually sucks. -- zaitcev 1999/05/12
45 *
46 * To find irq for a device we determine which routing map
47 * is in effect or, in other words, on which machine we are running.
48 * We use PROM name for this although other techniques may be used
49 * in special cases (Gleb reports a PROMless IIep based system).
50 * Once we know the map we take device configuration address and
51 * find PCIC pin number where INT line goes. Then we may either program
52 * preferred irq into the PCIC or supply the preexisting irq to the device.
53 */
54 struct pcic_ca2irq {
55 unsigned char busno; /* PCI bus number */
56 unsigned char devfn; /* Configuration address */
57 unsigned char pin; /* PCIC external interrupt pin */
58 unsigned char irq; /* Preferred IRQ (mappable in PCIC) */
59 unsigned int force; /* Enforce preferred IRQ */
60 };
61
62 struct pcic_sn2list {
63 char *sysname;
64 struct pcic_ca2irq *intmap;
65 int mapdim;
66 };
67
68 /*
69 * JavaEngine-1 apparently has different versions.
70 *
71 * According to communications with Sun folks, for P2 build 501-4628-03:
72 * pin 0 - parallel, audio;
73 * pin 1 - Ethernet;
74 * pin 2 - su;
75 * pin 3 - PS/2 kbd and mouse.
76 *
77 * OEM manual (805-1486):
78 * pin 0: Ethernet
79 * pin 1: All EBus
80 * pin 2: IGA (unused)
81 * pin 3: Not connected
82 * OEM manual says that 501-4628 & 501-4811 are the same thing,
83 * only the latter has NAND flash in place.
84 *
85 * So far unofficial Sun wins over the OEM manual. Poor OEMs...
86 */
87 static struct pcic_ca2irq pcic_i_je1a[] = { /* 501-4811-03 */
88 { 0, 0x00, 2, 12, 0 }, /* EBus: hogs all */
89 { 0, 0x01, 1, 6, 1 }, /* Happy Meal */
90 { 0, 0x80, 0, 7, 0 }, /* IGA (unused) */
91 };
92
93 /* XXX JS-E entry is incomplete - PCI Slot 2 address (pin 7)? */
94 static struct pcic_ca2irq pcic_i_jse[] = {
95 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
96 { 0, 0x01, 1, 6, 0 }, /* hme */
97 { 0, 0x08, 2, 9, 0 }, /* VGA - we hope not used :) */
98 { 0, 0x10, 6, 8, 0 }, /* PCI INTA# in Slot 1 */
99 { 0, 0x18, 7, 12, 0 }, /* PCI INTA# in Slot 2, shared w. RTC */
100 { 0, 0x38, 4, 9, 0 }, /* All ISA devices. Read 8259. */
101 { 0, 0x80, 5, 11, 0 }, /* EIDE */
102 /* {0,0x88, 0,0,0} - unknown device... PMU? Probably no interrupt. */
103 { 0, 0xA0, 4, 9, 0 }, /* USB */
104 /*
105 * Some pins belong to non-PCI devices, we hardcode them in drivers.
106 * sun4m timers - irq 10, 14
107 * PC style RTC - pin 7, irq 4 ?
108 * Smart card, Parallel - pin 4 shared with USB, ISA
109 * audio - pin 3, irq 5 ?
110 */
111 };
112
113 /* SPARCengine-6 was the original release name of CP1200.
114 * The documentation differs between the two versions
115 */
116 static struct pcic_ca2irq pcic_i_se6[] = {
117 { 0, 0x08, 0, 2, 0 }, /* SCSI */
118 { 0, 0x01, 1, 6, 0 }, /* HME */
119 { 0, 0x00, 3, 13, 0 }, /* EBus */
120 };
121
122 /*
123 * Krups (courtesy of Varol Kaptan)
124 * No documentation available, but it was easy to guess
125 * because it was very similar to Espresso.
126 *
127 * pin 0 - kbd, mouse, serial;
128 * pin 1 - Ethernet;
129 * pin 2 - igs (we do not use it);
130 * pin 3 - audio;
131 * pin 4,5,6 - unused;
132 * pin 7 - RTC (from P2 onwards as David B. says).
133 */
134 static struct pcic_ca2irq pcic_i_jk[] = {
135 { 0, 0x00, 0, 13, 0 }, /* Ebus - serial and keyboard */
136 { 0, 0x01, 1, 6, 0 }, /* hme */
137 };
138
139 /*
140 * Several entries in this list may point to the same routing map
141 * as several PROMs may be installed on the same physical board.
142 */
143 #define SN2L_INIT(name, map) \
144 { name, map, ARRAY_SIZE(map) }
145
146 static struct pcic_sn2list pcic_known_sysnames[] = {
147 SN2L_INIT("SUNW,JavaEngine1", pcic_i_je1a), /* JE1, PROM 2.32 */
148 SN2L_INIT("SUNW,JS-E", pcic_i_jse), /* PROLL JavaStation-E */
149 SN2L_INIT("SUNW,SPARCengine-6", pcic_i_se6), /* SPARCengine-6/CP-1200 */
150 SN2L_INIT("SUNW,JS-NC", pcic_i_jk), /* PROLL JavaStation-NC */
151 SN2L_INIT("SUNW,JSIIep", pcic_i_jk), /* OBP JavaStation-NC */
152 { NULL, NULL, 0 }
153 };
154
155 /*
156 * Only one PCIC per IIep,
157 * and since we have no SMP IIep, only one per system.
158 */
159 static int pcic0_up;
160 static struct linux_pcic pcic0;
161
162 void __iomem *pcic_regs;
163 volatile int pcic_speculative;
164 volatile int pcic_trapped;
165
166 static void pci_do_gettimeofday(struct timeval *tv);
167 static int pci_do_settimeofday(struct timespec *tv);
168
169 #define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (((unsigned int)bus) << 16) | (((unsigned int)device_fn) << 8) | (where & ~3))
170
pcic_read_config_dword(unsigned int busno,unsigned int devfn,int where,u32 * value)171 static int pcic_read_config_dword(unsigned int busno, unsigned int devfn,
172 int where, u32 *value)
173 {
174 struct linux_pcic *pcic;
175 unsigned long flags;
176
177 pcic = &pcic0;
178
179 local_irq_save(flags);
180 #if 0 /* does not fail here */
181 pcic_speculative = 1;
182 pcic_trapped = 0;
183 #endif
184 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
185 #if 0 /* does not fail here */
186 nop();
187 if (pcic_trapped) {
188 local_irq_restore(flags);
189 *value = ~0;
190 return 0;
191 }
192 #endif
193 pcic_speculative = 2;
194 pcic_trapped = 0;
195 *value = readl(pcic->pcic_config_space_data + (where&4));
196 nop();
197 if (pcic_trapped) {
198 pcic_speculative = 0;
199 local_irq_restore(flags);
200 *value = ~0;
201 return 0;
202 }
203 pcic_speculative = 0;
204 local_irq_restore(flags);
205 return 0;
206 }
207
pcic_read_config(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 * val)208 static int pcic_read_config(struct pci_bus *bus, unsigned int devfn,
209 int where, int size, u32 *val)
210 {
211 unsigned int v;
212
213 if (bus->number != 0) return -EINVAL;
214 switch (size) {
215 case 1:
216 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
217 *val = 0xff & (v >> (8*(where & 3)));
218 return 0;
219 case 2:
220 if (where&1) return -EINVAL;
221 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
222 *val = 0xffff & (v >> (8*(where & 3)));
223 return 0;
224 case 4:
225 if (where&3) return -EINVAL;
226 pcic_read_config_dword(bus->number, devfn, where&~3, val);
227 return 0;
228 }
229 return -EINVAL;
230 }
231
pcic_write_config_dword(unsigned int busno,unsigned int devfn,int where,u32 value)232 static int pcic_write_config_dword(unsigned int busno, unsigned int devfn,
233 int where, u32 value)
234 {
235 struct linux_pcic *pcic;
236 unsigned long flags;
237
238 pcic = &pcic0;
239
240 local_irq_save(flags);
241 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr);
242 writel(value, pcic->pcic_config_space_data + (where&4));
243 local_irq_restore(flags);
244 return 0;
245 }
246
pcic_write_config(struct pci_bus * bus,unsigned int devfn,int where,int size,u32 val)247 static int pcic_write_config(struct pci_bus *bus, unsigned int devfn,
248 int where, int size, u32 val)
249 {
250 unsigned int v;
251
252 if (bus->number != 0) return -EINVAL;
253 switch (size) {
254 case 1:
255 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
256 v = (v & ~(0xff << (8*(where&3)))) |
257 ((0xff&val) << (8*(where&3)));
258 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
259 case 2:
260 if (where&1) return -EINVAL;
261 pcic_read_config_dword(bus->number, devfn, where&~3, &v);
262 v = (v & ~(0xffff << (8*(where&3)))) |
263 ((0xffff&val) << (8*(where&3)));
264 return pcic_write_config_dword(bus->number, devfn, where&~3, v);
265 case 4:
266 if (where&3) return -EINVAL;
267 return pcic_write_config_dword(bus->number, devfn, where, val);
268 }
269 return -EINVAL;
270 }
271
272 static struct pci_ops pcic_ops = {
273 .read = pcic_read_config,
274 .write = pcic_write_config,
275 };
276
277 /*
278 * On sparc64 pcibios_init() calls pci_controller_probe().
279 * We want PCIC probed little ahead so that interrupt controller
280 * would be operational.
281 */
pcic_probe(void)282 int __init pcic_probe(void)
283 {
284 struct linux_pcic *pcic;
285 struct linux_prom_registers regs[PROMREG_MAX];
286 struct linux_pbm_info* pbm;
287 char namebuf[64];
288 int node;
289 int err;
290
291 if (pcic0_up) {
292 prom_printf("PCIC: called twice!\n");
293 prom_halt();
294 }
295 pcic = &pcic0;
296
297 node = prom_getchild (prom_root_node);
298 node = prom_searchsiblings (node, "pci");
299 if (node == 0)
300 return -ENODEV;
301 /*
302 * Map in PCIC register set, config space, and IO base
303 */
304 err = prom_getproperty(node, "reg", (char*)regs, sizeof(regs));
305 if (err == 0 || err == -1) {
306 prom_printf("PCIC: Error, cannot get PCIC registers "
307 "from PROM.\n");
308 prom_halt();
309 }
310
311 pcic0_up = 1;
312
313 pcic->pcic_res_regs.name = "pcic_registers";
314 pcic->pcic_regs = ioremap(regs[0].phys_addr, regs[0].reg_size);
315 if (!pcic->pcic_regs) {
316 prom_printf("PCIC: Error, cannot map PCIC registers.\n");
317 prom_halt();
318 }
319
320 pcic->pcic_res_io.name = "pcic_io";
321 if ((pcic->pcic_io = (unsigned long)
322 ioremap(regs[1].phys_addr, 0x10000)) == 0) {
323 prom_printf("PCIC: Error, cannot map PCIC IO Base.\n");
324 prom_halt();
325 }
326
327 pcic->pcic_res_cfg_addr.name = "pcic_cfg_addr";
328 if ((pcic->pcic_config_space_addr =
329 ioremap(regs[2].phys_addr, regs[2].reg_size * 2)) == 0) {
330 prom_printf("PCIC: Error, cannot map "
331 "PCI Configuration Space Address.\n");
332 prom_halt();
333 }
334
335 /*
336 * Docs say three least significant bits in address and data
337 * must be the same. Thus, we need adjust size of data.
338 */
339 pcic->pcic_res_cfg_data.name = "pcic_cfg_data";
340 if ((pcic->pcic_config_space_data =
341 ioremap(regs[3].phys_addr, regs[3].reg_size * 2)) == 0) {
342 prom_printf("PCIC: Error, cannot map "
343 "PCI Configuration Space Data.\n");
344 prom_halt();
345 }
346
347 pbm = &pcic->pbm;
348 pbm->prom_node = node;
349 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
350 strcpy(pbm->prom_name, namebuf);
351
352 {
353 extern volatile int t_nmi[1];
354 extern int pcic_nmi_trap_patch[1];
355
356 t_nmi[0] = pcic_nmi_trap_patch[0];
357 t_nmi[1] = pcic_nmi_trap_patch[1];
358 t_nmi[2] = pcic_nmi_trap_patch[2];
359 t_nmi[3] = pcic_nmi_trap_patch[3];
360 swift_flush_dcache();
361 pcic_regs = pcic->pcic_regs;
362 }
363
364 prom_getstring(prom_root_node, "name", namebuf, 63); namebuf[63] = 0;
365 {
366 struct pcic_sn2list *p;
367
368 for (p = pcic_known_sysnames; p->sysname != NULL; p++) {
369 if (strcmp(namebuf, p->sysname) == 0)
370 break;
371 }
372 pcic->pcic_imap = p->intmap;
373 pcic->pcic_imdim = p->mapdim;
374 }
375 if (pcic->pcic_imap == NULL) {
376 /*
377 * We do not panic here for the sake of embedded systems.
378 */
379 printk("PCIC: System %s is unknown, cannot route interrupts\n",
380 namebuf);
381 }
382
383 return 0;
384 }
385
pcic_pbm_scan_bus(struct linux_pcic * pcic)386 static void __init pcic_pbm_scan_bus(struct linux_pcic *pcic)
387 {
388 struct linux_pbm_info *pbm = &pcic->pbm;
389
390 pbm->pci_bus = pci_scan_bus(pbm->pci_first_busno, &pcic_ops, pbm);
391 #if 0 /* deadwood transplanted from sparc64 */
392 pci_fill_in_pbm_cookies(pbm->pci_bus, pbm, pbm->prom_node);
393 pci_record_assignments(pbm, pbm->pci_bus);
394 pci_assign_unassigned(pbm, pbm->pci_bus);
395 pci_fixup_irq(pbm, pbm->pci_bus);
396 #endif
397 }
398
399 /*
400 * Main entry point from the PCI subsystem.
401 */
pcic_init(void)402 static int __init pcic_init(void)
403 {
404 struct linux_pcic *pcic;
405
406 /*
407 * PCIC should be initialized at start of the timer.
408 * So, here we report the presence of PCIC and do some magic passes.
409 */
410 if(!pcic0_up)
411 return 0;
412 pcic = &pcic0;
413
414 /*
415 * Switch off IOTLB translation.
416 */
417 writeb(PCI_DVMA_CONTROL_IOTLB_DISABLE,
418 pcic->pcic_regs+PCI_DVMA_CONTROL);
419
420 /*
421 * Increase mapped size for PCI memory space (DMA access).
422 * Should be done in that order (size first, address second).
423 * Why we couldn't set up 4GB and forget about it? XXX
424 */
425 writel(0xF0000000UL, pcic->pcic_regs+PCI_SIZE_0);
426 writel(0+PCI_BASE_ADDRESS_SPACE_MEMORY,
427 pcic->pcic_regs+PCI_BASE_ADDRESS_0);
428
429 pcic_pbm_scan_bus(pcic);
430
431 return 0;
432 }
433
pcic_present(void)434 int pcic_present(void)
435 {
436 return pcic0_up;
437 }
438
pdev_to_pnode(struct linux_pbm_info * pbm,struct pci_dev * pdev)439 static int __devinit pdev_to_pnode(struct linux_pbm_info *pbm,
440 struct pci_dev *pdev)
441 {
442 struct linux_prom_pci_registers regs[PROMREG_MAX];
443 int err;
444 int node = prom_getchild(pbm->prom_node);
445
446 while(node) {
447 err = prom_getproperty(node, "reg",
448 (char *)®s[0], sizeof(regs));
449 if(err != 0 && err != -1) {
450 unsigned long devfn = (regs[0].which_io >> 8) & 0xff;
451 if(devfn == pdev->devfn)
452 return node;
453 }
454 node = prom_getsibling(node);
455 }
456 return 0;
457 }
458
pci_devcookie_alloc(void)459 static inline struct pcidev_cookie *pci_devcookie_alloc(void)
460 {
461 return kmalloc(sizeof(struct pcidev_cookie), GFP_ATOMIC);
462 }
463
pcic_map_pci_device(struct linux_pcic * pcic,struct pci_dev * dev,int node)464 static void pcic_map_pci_device(struct linux_pcic *pcic,
465 struct pci_dev *dev, int node)
466 {
467 char namebuf[64];
468 unsigned long address;
469 unsigned long flags;
470 int j;
471
472 if (node == 0 || node == -1) {
473 strcpy(namebuf, "???");
474 } else {
475 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0;
476 }
477
478 for (j = 0; j < 6; j++) {
479 address = dev->resource[j].start;
480 if (address == 0) break; /* are sequential */
481 flags = dev->resource[j].flags;
482 if ((flags & IORESOURCE_IO) != 0) {
483 if (address < 0x10000) {
484 /*
485 * A device responds to I/O cycles on PCI.
486 * We generate these cycles with memory
487 * access into the fixed map (phys 0x30000000).
488 *
489 * Since a device driver does not want to
490 * do ioremap() before accessing PC-style I/O,
491 * we supply virtual, ready to access address.
492 *
493 * Note that request_region()
494 * works for these devices.
495 *
496 * XXX Neat trick, but it's a *bad* idea
497 * to shit into regions like that.
498 * What if we want to allocate one more
499 * PCI base address...
500 */
501 dev->resource[j].start =
502 pcic->pcic_io + address;
503 dev->resource[j].end = 1; /* XXX */
504 dev->resource[j].flags =
505 (flags & ~IORESOURCE_IO) | IORESOURCE_MEM;
506 } else {
507 /*
508 * OOPS... PCI Spec allows this. Sun does
509 * not have any devices getting above 64K
510 * so it must be user with a weird I/O
511 * board in a PCI slot. We must remap it
512 * under 64K but it is not done yet. XXX
513 */
514 printk("PCIC: Skipping I/O space at 0x%lx, "
515 "this will Oops if a driver attaches "
516 "device '%s' at %02x:%02x)\n", address,
517 namebuf, dev->bus->number, dev->devfn);
518 }
519 }
520 }
521 }
522
523 static void
pcic_fill_irq(struct linux_pcic * pcic,struct pci_dev * dev,int node)524 pcic_fill_irq(struct linux_pcic *pcic, struct pci_dev *dev, int node)
525 {
526 struct pcic_ca2irq *p;
527 int i, ivec;
528 char namebuf[64];
529
530 if (node == 0 || node == -1) {
531 strcpy(namebuf, "???");
532 } else {
533 prom_getstring(node, "name", namebuf, sizeof(namebuf));
534 }
535
536 if ((p = pcic->pcic_imap) == 0) {
537 dev->irq = 0;
538 return;
539 }
540 for (i = 0; i < pcic->pcic_imdim; i++) {
541 if (p->busno == dev->bus->number && p->devfn == dev->devfn)
542 break;
543 p++;
544 }
545 if (i >= pcic->pcic_imdim) {
546 printk("PCIC: device %s devfn %02x:%02x not found in %d\n",
547 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim);
548 dev->irq = 0;
549 return;
550 }
551
552 i = p->pin;
553 if (i >= 0 && i < 4) {
554 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
555 dev->irq = ivec >> (i << 2) & 0xF;
556 } else if (i >= 4 && i < 8) {
557 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
558 dev->irq = ivec >> ((i-4) << 2) & 0xF;
559 } else { /* Corrupted map */
560 printk("PCIC: BAD PIN %d\n", i); for (;;) {}
561 }
562 /* P3 */ /* printk("PCIC: device %s pin %d ivec 0x%x irq %x\n", namebuf, i, ivec, dev->irq); */
563
564 /*
565 * dev->irq=0 means PROM did not bother to program the upper
566 * half of PCIC. This happens on JS-E with PROM 3.11, for instance.
567 */
568 if (dev->irq == 0 || p->force) {
569 if (p->irq == 0 || p->irq >= 15) { /* Corrupted map */
570 printk("PCIC: BAD IRQ %d\n", p->irq); for (;;) {}
571 }
572 printk("PCIC: setting irq %d at pin %d for device %02x:%02x\n",
573 p->irq, p->pin, dev->bus->number, dev->devfn);
574 dev->irq = p->irq;
575
576 i = p->pin;
577 if (i >= 4) {
578 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
579 ivec &= ~(0xF << ((i - 4) << 2));
580 ivec |= p->irq << ((i - 4) << 2);
581 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_HI);
582 } else {
583 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
584 ivec &= ~(0xF << (i << 2));
585 ivec |= p->irq << (i << 2);
586 writew(ivec, pcic->pcic_regs+PCI_INT_SELECT_LO);
587 }
588 }
589
590 return;
591 }
592
593 /*
594 * Normally called from {do_}pci_scan_bus...
595 */
pcibios_fixup_bus(struct pci_bus * bus)596 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
597 {
598 struct pci_dev *dev;
599 int i, has_io, has_mem;
600 unsigned int cmd;
601 struct linux_pcic *pcic;
602 /* struct linux_pbm_info* pbm = &pcic->pbm; */
603 int node;
604 struct pcidev_cookie *pcp;
605
606 if (!pcic0_up) {
607 printk("pcibios_fixup_bus: no PCIC\n");
608 return;
609 }
610 pcic = &pcic0;
611
612 /*
613 * Next crud is an equivalent of pbm = pcic_bus_to_pbm(bus);
614 */
615 if (bus->number != 0) {
616 printk("pcibios_fixup_bus: nonzero bus 0x%x\n", bus->number);
617 return;
618 }
619
620 list_for_each_entry(dev, &bus->devices, bus_list) {
621
622 /*
623 * Comment from i386 branch:
624 * There are buggy BIOSes that forget to enable I/O and memory
625 * access to PCI devices. We try to fix this, but we need to
626 * be sure that the BIOS didn't forget to assign an address
627 * to the device. [mj]
628 * OBP is a case of such BIOS :-)
629 */
630 has_io = has_mem = 0;
631 for(i=0; i<6; i++) {
632 unsigned long f = dev->resource[i].flags;
633 if (f & IORESOURCE_IO) {
634 has_io = 1;
635 } else if (f & IORESOURCE_MEM)
636 has_mem = 1;
637 }
638 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd);
639 if (has_io && !(cmd & PCI_COMMAND_IO)) {
640 printk("PCIC: Enabling I/O for device %02x:%02x\n",
641 dev->bus->number, dev->devfn);
642 cmd |= PCI_COMMAND_IO;
643 pcic_write_config(dev->bus, dev->devfn,
644 PCI_COMMAND, 2, cmd);
645 }
646 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
647 printk("PCIC: Enabling memory for device %02x:%02x\n",
648 dev->bus->number, dev->devfn);
649 cmd |= PCI_COMMAND_MEMORY;
650 pcic_write_config(dev->bus, dev->devfn,
651 PCI_COMMAND, 2, cmd);
652 }
653
654 node = pdev_to_pnode(&pcic->pbm, dev);
655 if(node == 0)
656 node = -1;
657
658 /* cookies */
659 pcp = pci_devcookie_alloc();
660 pcp->pbm = &pcic->pbm;
661 pcp->prom_node = of_find_node_by_phandle(node);
662 dev->sysdata = pcp;
663
664 /* fixing I/O to look like memory */
665 if ((dev->class>>16) != PCI_BASE_CLASS_BRIDGE)
666 pcic_map_pci_device(pcic, dev, node);
667
668 pcic_fill_irq(pcic, dev, node);
669 }
670 }
671
672 /*
673 * pcic_pin_to_irq() is exported to bus probing code
674 */
675 unsigned int
pcic_pin_to_irq(unsigned int pin,const char * name)676 pcic_pin_to_irq(unsigned int pin, const char *name)
677 {
678 struct linux_pcic *pcic = &pcic0;
679 unsigned int irq;
680 unsigned int ivec;
681
682 if (pin < 4) {
683 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_LO);
684 irq = ivec >> (pin << 2) & 0xF;
685 } else if (pin < 8) {
686 ivec = readw(pcic->pcic_regs+PCI_INT_SELECT_HI);
687 irq = ivec >> ((pin-4) << 2) & 0xF;
688 } else { /* Corrupted map */
689 printk("PCIC: BAD PIN %d FOR %s\n", pin, name);
690 for (;;) {} /* XXX Cannot panic properly in case of PROLL */
691 }
692 /* P3 */ /* printk("PCIC: dev %s pin %d ivec 0x%x irq %x\n", name, pin, ivec, irq); */
693 return irq;
694 }
695
696 /* Makes compiler happy */
697 static volatile int pcic_timer_dummy;
698
pcic_clear_clock_irq(void)699 static void pcic_clear_clock_irq(void)
700 {
701 pcic_timer_dummy = readl(pcic0.pcic_regs+PCI_SYS_LIMIT);
702 }
703
pcic_timer_handler(int irq,void * h)704 static irqreturn_t pcic_timer_handler (int irq, void *h)
705 {
706 write_seqlock(&xtime_lock); /* Dummy, to show that we remember */
707 pcic_clear_clock_irq();
708 do_timer(1);
709 write_sequnlock(&xtime_lock);
710 #ifndef CONFIG_SMP
711 update_process_times(user_mode(get_irq_regs()));
712 #endif
713 return IRQ_HANDLED;
714 }
715
716 #define USECS_PER_JIFFY 10000 /* We have 100HZ "standard" timer for sparc */
717 #define TICK_TIMER_LIMIT ((100*1000000/4)/100)
718
pci_time_init(void)719 void __init pci_time_init(void)
720 {
721 struct linux_pcic *pcic = &pcic0;
722 unsigned long v;
723 int timer_irq, irq;
724
725 /* A hack until do_gettimeofday prototype is moved to arch specific headers
726 and btfixupped. Patch do_gettimeofday with ba pci_do_gettimeofday; nop */
727 ((unsigned int *)do_gettimeofday)[0] =
728 0x10800000 | ((((unsigned long)pci_do_gettimeofday -
729 (unsigned long)do_gettimeofday) >> 2) & 0x003fffff);
730 ((unsigned int *)do_gettimeofday)[1] = 0x01000000;
731 BTFIXUPSET_CALL(bus_do_settimeofday, pci_do_settimeofday, BTFIXUPCALL_NORM);
732 btfixup();
733
734 writel (TICK_TIMER_LIMIT, pcic->pcic_regs+PCI_SYS_LIMIT);
735 /* PROM should set appropriate irq */
736 v = readb(pcic->pcic_regs+PCI_COUNTER_IRQ);
737 timer_irq = PCI_COUNTER_IRQ_SYS(v);
738 writel (PCI_COUNTER_IRQ_SET(timer_irq, 0),
739 pcic->pcic_regs+PCI_COUNTER_IRQ);
740 irq = request_irq(timer_irq, pcic_timer_handler,
741 (IRQF_DISABLED | SA_STATIC_ALLOC), "timer", NULL);
742 if (irq) {
743 prom_printf("time_init: unable to attach IRQ%d\n", timer_irq);
744 prom_halt();
745 }
746 local_irq_enable();
747 }
748
do_gettimeoffset(void)749 static inline unsigned long do_gettimeoffset(void)
750 {
751 /*
752 * We divide all by 100
753 * to have microsecond resolution and to avoid overflow
754 */
755 unsigned long count =
756 readl(pcic0.pcic_regs+PCI_SYS_COUNTER) & ~PCI_SYS_COUNTER_OVERFLOW;
757 count = ((count/100)*USECS_PER_JIFFY) / (TICK_TIMER_LIMIT/100);
758 return count;
759 }
760
pci_do_gettimeofday(struct timeval * tv)761 static void pci_do_gettimeofday(struct timeval *tv)
762 {
763 unsigned long flags;
764 unsigned long seq;
765 unsigned long usec, sec;
766 unsigned long max_ntp_tick = tick_usec - tickadj;
767
768 do {
769 seq = read_seqbegin_irqsave(&xtime_lock, flags);
770 usec = do_gettimeoffset();
771
772 /*
773 * If time_adjust is negative then NTP is slowing the clock
774 * so make sure not to go into next possible interval.
775 * Better to lose some accuracy than have time go backwards..
776 */
777 if (unlikely(time_adjust < 0))
778 usec = min(usec, max_ntp_tick);
779
780 sec = xtime.tv_sec;
781 usec += (xtime.tv_nsec / 1000);
782 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
783
784 while (usec >= 1000000) {
785 usec -= 1000000;
786 sec++;
787 }
788
789 tv->tv_sec = sec;
790 tv->tv_usec = usec;
791 }
792
pci_do_settimeofday(struct timespec * tv)793 static int pci_do_settimeofday(struct timespec *tv)
794 {
795 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
796 return -EINVAL;
797
798 /*
799 * This is revolting. We need to set "xtime" correctly. However, the
800 * value in this location is the value at the most recent update of
801 * wall time. Discover what correction gettimeofday() would have
802 * made, and then undo it!
803 */
804 tv->tv_nsec -= 1000 * do_gettimeoffset();
805 while (tv->tv_nsec < 0) {
806 tv->tv_nsec += NSEC_PER_SEC;
807 tv->tv_sec--;
808 }
809
810 wall_to_monotonic.tv_sec += xtime.tv_sec - tv->tv_sec;
811 wall_to_monotonic.tv_nsec += xtime.tv_nsec - tv->tv_nsec;
812
813 if (wall_to_monotonic.tv_nsec > NSEC_PER_SEC) {
814 wall_to_monotonic.tv_nsec -= NSEC_PER_SEC;
815 wall_to_monotonic.tv_sec++;
816 }
817 if (wall_to_monotonic.tv_nsec < 0) {
818 wall_to_monotonic.tv_nsec += NSEC_PER_SEC;
819 wall_to_monotonic.tv_sec--;
820 }
821
822 xtime.tv_sec = tv->tv_sec;
823 xtime.tv_nsec = tv->tv_nsec;
824 ntp_clear();
825 return 0;
826 }
827
828 #if 0
829 static void watchdog_reset() {
830 writeb(0, pcic->pcic_regs+PCI_SYS_STATUS);
831 }
832 #endif
833
834 /*
835 * Other archs parse arguments here.
836 */
pcibios_setup(char * str)837 char * __devinit pcibios_setup(char *str)
838 {
839 return str;
840 }
841
pcibios_align_resource(void * data,struct resource * res,resource_size_t size,resource_size_t align)842 void pcibios_align_resource(void *data, struct resource *res,
843 resource_size_t size, resource_size_t align)
844 {
845 }
846
pcibios_enable_device(struct pci_dev * pdev,int mask)847 int pcibios_enable_device(struct pci_dev *pdev, int mask)
848 {
849 return 0;
850 }
851
852 /*
853 * NMI
854 */
pcic_nmi(unsigned int pend,struct pt_regs * regs)855 void pcic_nmi(unsigned int pend, struct pt_regs *regs)
856 {
857
858 pend = flip_dword(pend);
859
860 if (!pcic_speculative || (pend & PCI_SYS_INT_PENDING_PIO) == 0) {
861 /*
862 * XXX On CP-1200 PCI #SERR may happen, we do not know
863 * what to do about it yet.
864 */
865 printk("Aiee, NMI pend 0x%x pc 0x%x spec %d, hanging\n",
866 pend, (int)regs->pc, pcic_speculative);
867 for (;;) { }
868 }
869 pcic_speculative = 0;
870 pcic_trapped = 1;
871 regs->pc = regs->npc;
872 regs->npc += 4;
873 }
874
get_irqmask(int irq_nr)875 static inline unsigned long get_irqmask(int irq_nr)
876 {
877 return 1 << irq_nr;
878 }
879
pcic_disable_irq(unsigned int irq_nr)880 static void pcic_disable_irq(unsigned int irq_nr)
881 {
882 unsigned long mask, flags;
883
884 mask = get_irqmask(irq_nr);
885 local_irq_save(flags);
886 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
887 local_irq_restore(flags);
888 }
889
pcic_enable_irq(unsigned int irq_nr)890 static void pcic_enable_irq(unsigned int irq_nr)
891 {
892 unsigned long mask, flags;
893
894 mask = get_irqmask(irq_nr);
895 local_irq_save(flags);
896 writel(mask, pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
897 local_irq_restore(flags);
898 }
899
pcic_load_profile_irq(int cpu,unsigned int limit)900 static void pcic_load_profile_irq(int cpu, unsigned int limit)
901 {
902 printk("PCIC: unimplemented code: FILE=%s LINE=%d", __FILE__, __LINE__);
903 }
904
905 /* We assume the caller has disabled local interrupts when these are called,
906 * or else very bizarre behavior will result.
907 */
pcic_disable_pil_irq(unsigned int pil)908 static void pcic_disable_pil_irq(unsigned int pil)
909 {
910 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_SET);
911 }
912
pcic_enable_pil_irq(unsigned int pil)913 static void pcic_enable_pil_irq(unsigned int pil)
914 {
915 writel(get_irqmask(pil), pcic0.pcic_regs+PCI_SYS_INT_TARGET_MASK_CLEAR);
916 }
917
sun4m_pci_init_IRQ(void)918 void __init sun4m_pci_init_IRQ(void)
919 {
920 BTFIXUPSET_CALL(enable_irq, pcic_enable_irq, BTFIXUPCALL_NORM);
921 BTFIXUPSET_CALL(disable_irq, pcic_disable_irq, BTFIXUPCALL_NORM);
922 BTFIXUPSET_CALL(enable_pil_irq, pcic_enable_pil_irq, BTFIXUPCALL_NORM);
923 BTFIXUPSET_CALL(disable_pil_irq, pcic_disable_pil_irq, BTFIXUPCALL_NORM);
924 BTFIXUPSET_CALL(clear_clock_irq, pcic_clear_clock_irq, BTFIXUPCALL_NORM);
925 BTFIXUPSET_CALL(load_profile_irq, pcic_load_profile_irq, BTFIXUPCALL_NORM);
926 }
927
pcibios_assign_resource(struct pci_dev * pdev,int resource)928 int pcibios_assign_resource(struct pci_dev *pdev, int resource)
929 {
930 return -ENXIO;
931 }
932
pci_device_to_OF_node(struct pci_dev * pdev)933 struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
934 {
935 struct pcidev_cookie *pc = pdev->sysdata;
936
937 return pc->prom_node;
938 }
939 EXPORT_SYMBOL(pci_device_to_OF_node);
940
941 /*
942 * This probably belongs here rather than ioport.c because
943 * we do not want this crud linked into SBus kernels.
944 * Also, think for a moment about likes of floppy.c that
945 * include architecture specific parts. They may want to redefine ins/outs.
946 *
947 * We do not use horrible macros here because we want to
948 * advance pointer by sizeof(size).
949 */
outsb(unsigned long addr,const void * src,unsigned long count)950 void outsb(unsigned long addr, const void *src, unsigned long count)
951 {
952 while (count) {
953 count -= 1;
954 outb(*(const char *)src, addr);
955 src += 1;
956 /* addr += 1; */
957 }
958 }
959 EXPORT_SYMBOL(outsb);
960
outsw(unsigned long addr,const void * src,unsigned long count)961 void outsw(unsigned long addr, const void *src, unsigned long count)
962 {
963 while (count) {
964 count -= 2;
965 outw(*(const short *)src, addr);
966 src += 2;
967 /* addr += 2; */
968 }
969 }
970 EXPORT_SYMBOL(outsw);
971
outsl(unsigned long addr,const void * src,unsigned long count)972 void outsl(unsigned long addr, const void *src, unsigned long count)
973 {
974 while (count) {
975 count -= 4;
976 outl(*(const long *)src, addr);
977 src += 4;
978 /* addr += 4; */
979 }
980 }
981 EXPORT_SYMBOL(outsl);
982
insb(unsigned long addr,void * dst,unsigned long count)983 void insb(unsigned long addr, void *dst, unsigned long count)
984 {
985 while (count) {
986 count -= 1;
987 *(unsigned char *)dst = inb(addr);
988 dst += 1;
989 /* addr += 1; */
990 }
991 }
992 EXPORT_SYMBOL(insb);
993
insw(unsigned long addr,void * dst,unsigned long count)994 void insw(unsigned long addr, void *dst, unsigned long count)
995 {
996 while (count) {
997 count -= 2;
998 *(unsigned short *)dst = inw(addr);
999 dst += 2;
1000 /* addr += 2; */
1001 }
1002 }
1003 EXPORT_SYMBOL(insw);
1004
insl(unsigned long addr,void * dst,unsigned long count)1005 void insl(unsigned long addr, void *dst, unsigned long count)
1006 {
1007 while (count) {
1008 count -= 4;
1009 /*
1010 * XXX I am sure we are in for an unaligned trap here.
1011 */
1012 *(unsigned long *)dst = inl(addr);
1013 dst += 4;
1014 /* addr += 4; */
1015 }
1016 }
1017 EXPORT_SYMBOL(insl);
1018
1019 subsys_initcall(pcic_init);
1020