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1 /*******************************************************************************
2 
3   Copyright(c) 2006 Tundra Semiconductor Corporation.
4 
5   This program is free software; you can redistribute it and/or modify it
6   under the terms of the GNU General Public License as published by the Free
7   Software Foundation; either version 2 of the License, or (at your option)
8   any later version.
9 
10   This program is distributed in the hope that it will be useful, but WITHOUT
11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13   more details.
14 
15   You should have received a copy of the GNU General Public License along with
16   this program; if not, write to the Free Software Foundation, Inc., 59
17   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
18 
19 *******************************************************************************/
20 
21 /* This driver is based on the driver code originally developed
22  * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23  * scott.wood@timesys.com  * Copyright (C) 2003 TimeSys Corporation
24  *
25  * Currently changes from original version are:
26  * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27  * - modifications to handle two ports independently and support for
28  *   additional PHY devices (alexandre.bounine@tundra.com)
29  * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30  *
31  */
32 
33 #include <linux/module.h>
34 #include <linux/types.h>
35 #include <linux/init.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ethtool.h>
40 #include <linux/skbuff.h>
41 #include <linux/slab.h>
42 #include <linux/spinlock.h>
43 #include <linux/delay.h>
44 #include <linux/crc32.h>
45 #include <linux/mii.h>
46 #include <linux/device.h>
47 #include <linux/pci.h>
48 #include <linux/rtnetlink.h>
49 #include <linux/timer.h>
50 #include <linux/platform_device.h>
51 
52 #include <asm/system.h>
53 #include <asm/io.h>
54 #include <asm/tsi108.h>
55 
56 #include "tsi108_eth.h"
57 
58 #define MII_READ_DELAY 10000	/* max link wait time in msec */
59 
60 #define TSI108_RXRING_LEN     256
61 
62 /* NOTE: The driver currently does not support receiving packets
63  * larger than the buffer size, so don't decrease this (unless you
64  * want to add such support).
65  */
66 #define TSI108_RXBUF_SIZE     1536
67 
68 #define TSI108_TXRING_LEN     256
69 
70 #define TSI108_TX_INT_FREQ    64
71 
72 /* Check the phy status every half a second. */
73 #define CHECK_PHY_INTERVAL (HZ/2)
74 
75 static int tsi108_init_one(struct platform_device *pdev);
76 static int tsi108_ether_remove(struct platform_device *pdev);
77 
78 struct tsi108_prv_data {
79 	void  __iomem *regs;	/* Base of normal regs */
80 	void  __iomem *phyregs;	/* Base of register bank used for PHY access */
81 
82 	struct net_device *dev;
83 	struct napi_struct napi;
84 
85 	unsigned int phy;		/* Index of PHY for this interface */
86 	unsigned int irq_num;
87 	unsigned int id;
88 	unsigned int phy_type;
89 
90 	struct timer_list timer;/* Timer that triggers the check phy function */
91 	unsigned int rxtail;	/* Next entry in rxring to read */
92 	unsigned int rxhead;	/* Next entry in rxring to give a new buffer */
93 	unsigned int rxfree;	/* Number of free, allocated RX buffers */
94 
95 	unsigned int rxpending;	/* Non-zero if there are still descriptors
96 				 * to be processed from a previous descriptor
97 				 * interrupt condition that has been cleared */
98 
99 	unsigned int txtail;	/* Next TX descriptor to check status on */
100 	unsigned int txhead;	/* Next TX descriptor to use */
101 
102 	/* Number of free TX descriptors.  This could be calculated from
103 	 * rxhead and rxtail if one descriptor were left unused to disambiguate
104 	 * full and empty conditions, but it's simpler to just keep track
105 	 * explicitly. */
106 
107 	unsigned int txfree;
108 
109 	unsigned int phy_ok;		/* The PHY is currently powered on. */
110 
111 	/* PHY status (duplex is 1 for half, 2 for full,
112 	 * so that the default 0 indicates that neither has
113 	 * yet been configured). */
114 
115 	unsigned int link_up;
116 	unsigned int speed;
117 	unsigned int duplex;
118 
119 	tx_desc *txring;
120 	rx_desc *rxring;
121 	struct sk_buff *txskbs[TSI108_TXRING_LEN];
122 	struct sk_buff *rxskbs[TSI108_RXRING_LEN];
123 
124 	dma_addr_t txdma, rxdma;
125 
126 	/* txlock nests in misclock and phy_lock */
127 
128 	spinlock_t txlock, misclock;
129 
130 	/* stats is used to hold the upper bits of each hardware counter,
131 	 * and tmpstats is used to hold the full values for returning
132 	 * to the caller of get_stats().  They must be separate in case
133 	 * an overflow interrupt occurs before the stats are consumed.
134 	 */
135 
136 	struct net_device_stats stats;
137 	struct net_device_stats tmpstats;
138 
139 	/* These stats are kept separate in hardware, thus require individual
140 	 * fields for handling carry.  They are combined in get_stats.
141 	 */
142 
143 	unsigned long rx_fcs;	/* Add to rx_frame_errors */
144 	unsigned long rx_short_fcs;	/* Add to rx_frame_errors */
145 	unsigned long rx_long_fcs;	/* Add to rx_frame_errors */
146 	unsigned long rx_underruns;	/* Add to rx_length_errors */
147 	unsigned long rx_overruns;	/* Add to rx_length_errors */
148 
149 	unsigned long tx_coll_abort;	/* Add to tx_aborted_errors/collisions */
150 	unsigned long tx_pause_drop;	/* Add to tx_aborted_errors */
151 
152 	unsigned long mc_hash[16];
153 	u32 msg_enable;			/* debug message level */
154 	struct mii_if_info mii_if;
155 	unsigned int init_media;
156 };
157 
158 /* Structure for a device driver */
159 
160 static struct platform_driver tsi_eth_driver = {
161 	.probe = tsi108_init_one,
162 	.remove = tsi108_ether_remove,
163 	.driver	= {
164 		.name = "tsi-ethernet",
165 		.owner = THIS_MODULE,
166 	},
167 };
168 
169 static void tsi108_timed_checker(unsigned long dev_ptr);
170 
dump_eth_one(struct net_device * dev)171 static void dump_eth_one(struct net_device *dev)
172 {
173 	struct tsi108_prv_data *data = netdev_priv(dev);
174 
175 	printk("Dumping %s...\n", dev->name);
176 	printk("intstat %x intmask %x phy_ok %d"
177 	       " link %d speed %d duplex %d\n",
178 	       TSI_READ(TSI108_EC_INTSTAT),
179 	       TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
180 	       data->link_up, data->speed, data->duplex);
181 
182 	printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
183 	       data->txhead, data->txtail, data->txfree,
184 	       TSI_READ(TSI108_EC_TXSTAT),
185 	       TSI_READ(TSI108_EC_TXESTAT),
186 	       TSI_READ(TSI108_EC_TXERR));
187 
188 	printk("RX: head %d, tail %d, free %d, stat %x,"
189 	       " estat %x, err %x, pending %d\n\n",
190 	       data->rxhead, data->rxtail, data->rxfree,
191 	       TSI_READ(TSI108_EC_RXSTAT),
192 	       TSI_READ(TSI108_EC_RXESTAT),
193 	       TSI_READ(TSI108_EC_RXERR), data->rxpending);
194 }
195 
196 /* Synchronization is needed between the thread and up/down events.
197  * Note that the PHY is accessed through the same registers for both
198  * interfaces, so this can't be made interface-specific.
199  */
200 
201 static DEFINE_SPINLOCK(phy_lock);
202 
tsi108_read_mii(struct tsi108_prv_data * data,int reg)203 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
204 {
205 	unsigned i;
206 
207 	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
208 				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
209 				(reg << TSI108_MAC_MII_ADDR_REG));
210 	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
211 	TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
212 	for (i = 0; i < 100; i++) {
213 		if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
214 		      (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
215 			break;
216 		udelay(10);
217 	}
218 
219 	if (i == 100)
220 		return 0xffff;
221 	else
222 		return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
223 }
224 
tsi108_write_mii(struct tsi108_prv_data * data,int reg,u16 val)225 static void tsi108_write_mii(struct tsi108_prv_data *data,
226 				int reg, u16 val)
227 {
228 	unsigned i = 100;
229 	TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
230 				(data->phy << TSI108_MAC_MII_ADDR_PHY) |
231 				(reg << TSI108_MAC_MII_ADDR_REG));
232 	TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
233 	while (i--) {
234 		if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
235 			TSI108_MAC_MII_IND_BUSY))
236 			break;
237 		udelay(10);
238 	}
239 }
240 
tsi108_mdio_read(struct net_device * dev,int addr,int reg)241 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
242 {
243 	struct tsi108_prv_data *data = netdev_priv(dev);
244 	return tsi108_read_mii(data, reg);
245 }
246 
tsi108_mdio_write(struct net_device * dev,int addr,int reg,int val)247 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
248 {
249 	struct tsi108_prv_data *data = netdev_priv(dev);
250 	tsi108_write_mii(data, reg, val);
251 }
252 
tsi108_write_tbi(struct tsi108_prv_data * data,int reg,u16 val)253 static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
254 					int reg, u16 val)
255 {
256 	unsigned i = 1000;
257 	TSI_WRITE(TSI108_MAC_MII_ADDR,
258 			     (0x1e << TSI108_MAC_MII_ADDR_PHY)
259 			     | (reg << TSI108_MAC_MII_ADDR_REG));
260 	TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
261 	while(i--) {
262 		if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
263 			return;
264 		udelay(10);
265 	}
266 	printk(KERN_ERR "%s function time out \n", __func__);
267 }
268 
mii_speed(struct mii_if_info * mii)269 static int mii_speed(struct mii_if_info *mii)
270 {
271 	int advert, lpa, val, media;
272 	int lpa2 = 0;
273 	int speed;
274 
275 	if (!mii_link_ok(mii))
276 		return 0;
277 
278 	val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
279 	if ((val & BMSR_ANEGCOMPLETE) == 0)
280 		return 0;
281 
282 	advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
283 	lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
284 	media = mii_nway_result(advert & lpa);
285 
286 	if (mii->supports_gmii)
287 		lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
288 
289 	speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
290 			(media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
291 	return speed;
292 }
293 
tsi108_check_phy(struct net_device * dev)294 static void tsi108_check_phy(struct net_device *dev)
295 {
296 	struct tsi108_prv_data *data = netdev_priv(dev);
297 	u32 mac_cfg2_reg, portctrl_reg;
298 	u32 duplex;
299 	u32 speed;
300 	unsigned long flags;
301 
302 	spin_lock_irqsave(&phy_lock, flags);
303 
304 	if (!data->phy_ok)
305 		goto out;
306 
307 	duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
308 	data->init_media = 0;
309 
310 	if (netif_carrier_ok(dev)) {
311 
312 		speed = mii_speed(&data->mii_if);
313 
314 		if ((speed != data->speed) || duplex) {
315 
316 			mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
317 			portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
318 
319 			mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
320 
321 			if (speed == 1000) {
322 				mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
323 				portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
324 			} else {
325 				mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
326 				portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
327 			}
328 
329 			data->speed = speed;
330 
331 			if (data->mii_if.full_duplex) {
332 				mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
333 				portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
334 				data->duplex = 2;
335 			} else {
336 				mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
337 				portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
338 				data->duplex = 1;
339 			}
340 
341 			TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
342 			TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
343 		}
344 
345 		if (data->link_up == 0) {
346 			/* The manual says it can take 3-4 usecs for the speed change
347 			 * to take effect.
348 			 */
349 			udelay(5);
350 
351 			spin_lock(&data->txlock);
352 			if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
353 				netif_wake_queue(dev);
354 
355 			data->link_up = 1;
356 			spin_unlock(&data->txlock);
357 		}
358 	} else {
359 		if (data->link_up == 1) {
360 			netif_stop_queue(dev);
361 			data->link_up = 0;
362 			printk(KERN_NOTICE "%s : link is down\n", dev->name);
363 		}
364 
365 		goto out;
366 	}
367 
368 
369 out:
370 	spin_unlock_irqrestore(&phy_lock, flags);
371 }
372 
373 static inline void
tsi108_stat_carry_one(int carry,int carry_bit,int carry_shift,unsigned long * upper)374 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
375 		      unsigned long *upper)
376 {
377 	if (carry & carry_bit)
378 		*upper += carry_shift;
379 }
380 
tsi108_stat_carry(struct net_device * dev)381 static void tsi108_stat_carry(struct net_device *dev)
382 {
383 	struct tsi108_prv_data *data = netdev_priv(dev);
384 	u32 carry1, carry2;
385 
386 	spin_lock_irq(&data->misclock);
387 
388 	carry1 = TSI_READ(TSI108_STAT_CARRY1);
389 	carry2 = TSI_READ(TSI108_STAT_CARRY2);
390 
391 	TSI_WRITE(TSI108_STAT_CARRY1, carry1);
392 	TSI_WRITE(TSI108_STAT_CARRY2, carry2);
393 
394 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
395 			      TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
396 
397 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
398 			      TSI108_STAT_RXPKTS_CARRY,
399 			      &data->stats.rx_packets);
400 
401 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
402 			      TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
403 
404 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
405 			      TSI108_STAT_RXMCAST_CARRY,
406 			      &data->stats.multicast);
407 
408 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
409 			      TSI108_STAT_RXALIGN_CARRY,
410 			      &data->stats.rx_frame_errors);
411 
412 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
413 			      TSI108_STAT_RXLENGTH_CARRY,
414 			      &data->stats.rx_length_errors);
415 
416 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
417 			      TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
418 
419 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
420 			      TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
421 
422 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
423 			      TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
424 
425 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
426 			      TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
427 
428 	tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
429 			      TSI108_STAT_RXDROP_CARRY,
430 			      &data->stats.rx_missed_errors);
431 
432 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
433 			      TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
434 
435 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
436 			      TSI108_STAT_TXPKTS_CARRY,
437 			      &data->stats.tx_packets);
438 
439 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
440 			      TSI108_STAT_TXEXDEF_CARRY,
441 			      &data->stats.tx_aborted_errors);
442 
443 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
444 			      TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
445 
446 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
447 			      TSI108_STAT_TXTCOL_CARRY,
448 			      &data->stats.collisions);
449 
450 	tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
451 			      TSI108_STAT_TXPAUSEDROP_CARRY,
452 			      &data->tx_pause_drop);
453 
454 	spin_unlock_irq(&data->misclock);
455 }
456 
457 /* Read a stat counter atomically with respect to carries.
458  * data->misclock must be held.
459  */
460 static inline unsigned long
tsi108_read_stat(struct tsi108_prv_data * data,int reg,int carry_bit,int carry_shift,unsigned long * upper)461 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
462 		 int carry_shift, unsigned long *upper)
463 {
464 	int carryreg;
465 	unsigned long val;
466 
467 	if (reg < 0xb0)
468 		carryreg = TSI108_STAT_CARRY1;
469 	else
470 		carryreg = TSI108_STAT_CARRY2;
471 
472       again:
473 	val = TSI_READ(reg) | *upper;
474 
475 	/* Check to see if it overflowed, but the interrupt hasn't
476 	 * been serviced yet.  If so, handle the carry here, and
477 	 * try again.
478 	 */
479 
480 	if (unlikely(TSI_READ(carryreg) & carry_bit)) {
481 		*upper += carry_shift;
482 		TSI_WRITE(carryreg, carry_bit);
483 		goto again;
484 	}
485 
486 	return val;
487 }
488 
tsi108_get_stats(struct net_device * dev)489 static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
490 {
491 	unsigned long excol;
492 
493 	struct tsi108_prv_data *data = netdev_priv(dev);
494 	spin_lock_irq(&data->misclock);
495 
496 	data->tmpstats.rx_packets =
497 	    tsi108_read_stat(data, TSI108_STAT_RXPKTS,
498 			     TSI108_STAT_CARRY1_RXPKTS,
499 			     TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
500 
501 	data->tmpstats.tx_packets =
502 	    tsi108_read_stat(data, TSI108_STAT_TXPKTS,
503 			     TSI108_STAT_CARRY2_TXPKTS,
504 			     TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
505 
506 	data->tmpstats.rx_bytes =
507 	    tsi108_read_stat(data, TSI108_STAT_RXBYTES,
508 			     TSI108_STAT_CARRY1_RXBYTES,
509 			     TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
510 
511 	data->tmpstats.tx_bytes =
512 	    tsi108_read_stat(data, TSI108_STAT_TXBYTES,
513 			     TSI108_STAT_CARRY2_TXBYTES,
514 			     TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
515 
516 	data->tmpstats.multicast =
517 	    tsi108_read_stat(data, TSI108_STAT_RXMCAST,
518 			     TSI108_STAT_CARRY1_RXMCAST,
519 			     TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
520 
521 	excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
522 				 TSI108_STAT_CARRY2_TXEXCOL,
523 				 TSI108_STAT_TXEXCOL_CARRY,
524 				 &data->tx_coll_abort);
525 
526 	data->tmpstats.collisions =
527 	    tsi108_read_stat(data, TSI108_STAT_TXTCOL,
528 			     TSI108_STAT_CARRY2_TXTCOL,
529 			     TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
530 
531 	data->tmpstats.collisions += excol;
532 
533 	data->tmpstats.rx_length_errors =
534 	    tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
535 			     TSI108_STAT_CARRY1_RXLENGTH,
536 			     TSI108_STAT_RXLENGTH_CARRY,
537 			     &data->stats.rx_length_errors);
538 
539 	data->tmpstats.rx_length_errors +=
540 	    tsi108_read_stat(data, TSI108_STAT_RXRUNT,
541 			     TSI108_STAT_CARRY1_RXRUNT,
542 			     TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
543 
544 	data->tmpstats.rx_length_errors +=
545 	    tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
546 			     TSI108_STAT_CARRY1_RXJUMBO,
547 			     TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
548 
549 	data->tmpstats.rx_frame_errors =
550 	    tsi108_read_stat(data, TSI108_STAT_RXALIGN,
551 			     TSI108_STAT_CARRY1_RXALIGN,
552 			     TSI108_STAT_RXALIGN_CARRY,
553 			     &data->stats.rx_frame_errors);
554 
555 	data->tmpstats.rx_frame_errors +=
556 	    tsi108_read_stat(data, TSI108_STAT_RXFCS,
557 			     TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
558 			     &data->rx_fcs);
559 
560 	data->tmpstats.rx_frame_errors +=
561 	    tsi108_read_stat(data, TSI108_STAT_RXFRAG,
562 			     TSI108_STAT_CARRY1_RXFRAG,
563 			     TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
564 
565 	data->tmpstats.rx_missed_errors =
566 	    tsi108_read_stat(data, TSI108_STAT_RXDROP,
567 			     TSI108_STAT_CARRY1_RXDROP,
568 			     TSI108_STAT_RXDROP_CARRY,
569 			     &data->stats.rx_missed_errors);
570 
571 	/* These three are maintained by software. */
572 	data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
573 	data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
574 
575 	data->tmpstats.tx_aborted_errors =
576 	    tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
577 			     TSI108_STAT_CARRY2_TXEXDEF,
578 			     TSI108_STAT_TXEXDEF_CARRY,
579 			     &data->stats.tx_aborted_errors);
580 
581 	data->tmpstats.tx_aborted_errors +=
582 	    tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
583 			     TSI108_STAT_CARRY2_TXPAUSE,
584 			     TSI108_STAT_TXPAUSEDROP_CARRY,
585 			     &data->tx_pause_drop);
586 
587 	data->tmpstats.tx_aborted_errors += excol;
588 
589 	data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
590 	data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
591 	    data->tmpstats.rx_crc_errors +
592 	    data->tmpstats.rx_frame_errors +
593 	    data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
594 
595 	spin_unlock_irq(&data->misclock);
596 	return &data->tmpstats;
597 }
598 
tsi108_restart_rx(struct tsi108_prv_data * data,struct net_device * dev)599 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
600 {
601 	TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
602 			     TSI108_EC_RXQ_PTRHIGH_VALID);
603 
604 	TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
605 			     | TSI108_EC_RXCTRL_QUEUE0);
606 }
607 
tsi108_restart_tx(struct tsi108_prv_data * data)608 static void tsi108_restart_tx(struct tsi108_prv_data * data)
609 {
610 	TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
611 			     TSI108_EC_TXQ_PTRHIGH_VALID);
612 
613 	TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
614 			     TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
615 }
616 
617 /* txlock must be held by caller, with IRQs disabled, and
618  * with permission to re-enable them when the lock is dropped.
619  */
tsi108_complete_tx(struct net_device * dev)620 static void tsi108_complete_tx(struct net_device *dev)
621 {
622 	struct tsi108_prv_data *data = netdev_priv(dev);
623 	int tx;
624 	struct sk_buff *skb;
625 	int release = 0;
626 
627 	while (!data->txfree || data->txhead != data->txtail) {
628 		tx = data->txtail;
629 
630 		if (data->txring[tx].misc & TSI108_TX_OWN)
631 			break;
632 
633 		skb = data->txskbs[tx];
634 
635 		if (!(data->txring[tx].misc & TSI108_TX_OK))
636 			printk("%s: bad tx packet, misc %x\n",
637 			       dev->name, data->txring[tx].misc);
638 
639 		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
640 		data->txfree++;
641 
642 		if (data->txring[tx].misc & TSI108_TX_EOF) {
643 			dev_kfree_skb_any(skb);
644 			release++;
645 		}
646 	}
647 
648 	if (release) {
649 		if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
650 			netif_wake_queue(dev);
651 	}
652 }
653 
tsi108_send_packet(struct sk_buff * skb,struct net_device * dev)654 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
655 {
656 	struct tsi108_prv_data *data = netdev_priv(dev);
657 	int frags = skb_shinfo(skb)->nr_frags + 1;
658 	int i;
659 
660 	if (!data->phy_ok && net_ratelimit())
661 		printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
662 
663 	if (!data->link_up) {
664 		printk(KERN_ERR "%s: Transmit while link is down!\n",
665 		       dev->name);
666 		netif_stop_queue(dev);
667 		return NETDEV_TX_BUSY;
668 	}
669 
670 	if (data->txfree < MAX_SKB_FRAGS + 1) {
671 		netif_stop_queue(dev);
672 
673 		if (net_ratelimit())
674 			printk(KERN_ERR "%s: Transmit with full tx ring!\n",
675 			       dev->name);
676 		return NETDEV_TX_BUSY;
677 	}
678 
679 	if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
680 		netif_stop_queue(dev);
681 	}
682 
683 	spin_lock_irq(&data->txlock);
684 
685 	for (i = 0; i < frags; i++) {
686 		int misc = 0;
687 		int tx = data->txhead;
688 
689 		/* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
690 		 * the interrupt bit.  TX descriptor-complete interrupts are
691 		 * enabled when the queue fills up, and masked when there is
692 		 * still free space.  This way, when saturating the outbound
693 		 * link, the tx interrupts are kept to a reasonable level.
694 		 * When the queue is not full, reclamation of skbs still occurs
695 		 * as new packets are transmitted, or on a queue-empty
696 		 * interrupt.
697 		 */
698 
699 		if ((tx % TSI108_TX_INT_FREQ == 0) &&
700 		    ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
701 			misc = TSI108_TX_INT;
702 
703 		data->txskbs[tx] = skb;
704 
705 		if (i == 0) {
706 			data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
707 					skb->len - skb->data_len, DMA_TO_DEVICE);
708 			data->txring[tx].len = skb->len - skb->data_len;
709 			misc |= TSI108_TX_SOF;
710 		} else {
711 			skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
712 
713 			data->txring[tx].buf0 =
714 			    dma_map_page(NULL, frag->page, frag->page_offset,
715 					    frag->size, DMA_TO_DEVICE);
716 			data->txring[tx].len = frag->size;
717 		}
718 
719 		if (i == frags - 1)
720 			misc |= TSI108_TX_EOF;
721 
722 		if (netif_msg_pktdata(data)) {
723 			int i;
724 			printk("%s: Tx Frame contents (%d)\n", dev->name,
725 			       skb->len);
726 			for (i = 0; i < skb->len; i++)
727 				printk(" %2.2x", skb->data[i]);
728 			printk(".\n");
729 		}
730 		data->txring[tx].misc = misc | TSI108_TX_OWN;
731 
732 		data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
733 		data->txfree--;
734 	}
735 
736 	tsi108_complete_tx(dev);
737 
738 	/* This must be done after the check for completed tx descriptors,
739 	 * so that the tail pointer is correct.
740 	 */
741 
742 	if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
743 		tsi108_restart_tx(data);
744 
745 	spin_unlock_irq(&data->txlock);
746 	return NETDEV_TX_OK;
747 }
748 
tsi108_complete_rx(struct net_device * dev,int budget)749 static int tsi108_complete_rx(struct net_device *dev, int budget)
750 {
751 	struct tsi108_prv_data *data = netdev_priv(dev);
752 	int done = 0;
753 
754 	while (data->rxfree && done != budget) {
755 		int rx = data->rxtail;
756 		struct sk_buff *skb;
757 
758 		if (data->rxring[rx].misc & TSI108_RX_OWN)
759 			break;
760 
761 		skb = data->rxskbs[rx];
762 		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
763 		data->rxfree--;
764 		done++;
765 
766 		if (data->rxring[rx].misc & TSI108_RX_BAD) {
767 			spin_lock_irq(&data->misclock);
768 
769 			if (data->rxring[rx].misc & TSI108_RX_CRC)
770 				data->stats.rx_crc_errors++;
771 			if (data->rxring[rx].misc & TSI108_RX_OVER)
772 				data->stats.rx_fifo_errors++;
773 
774 			spin_unlock_irq(&data->misclock);
775 
776 			dev_kfree_skb_any(skb);
777 			continue;
778 		}
779 		if (netif_msg_pktdata(data)) {
780 			int i;
781 			printk("%s: Rx Frame contents (%d)\n",
782 			       dev->name, data->rxring[rx].len);
783 			for (i = 0; i < data->rxring[rx].len; i++)
784 				printk(" %2.2x", skb->data[i]);
785 			printk(".\n");
786 		}
787 
788 		skb_put(skb, data->rxring[rx].len);
789 		skb->protocol = eth_type_trans(skb, dev);
790 		netif_receive_skb(skb);
791 	}
792 
793 	return done;
794 }
795 
tsi108_refill_rx(struct net_device * dev,int budget)796 static int tsi108_refill_rx(struct net_device *dev, int budget)
797 {
798 	struct tsi108_prv_data *data = netdev_priv(dev);
799 	int done = 0;
800 
801 	while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
802 		int rx = data->rxhead;
803 		struct sk_buff *skb;
804 
805 		data->rxskbs[rx] = skb = netdev_alloc_skb(dev,
806 							  TSI108_RXBUF_SIZE + 2);
807 		if (!skb)
808 			break;
809 
810 		skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
811 
812 		data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
813 							TSI108_RX_SKB_SIZE,
814 							DMA_FROM_DEVICE);
815 
816 		/* Sometimes the hardware sets blen to zero after packet
817 		 * reception, even though the manual says that it's only ever
818 		 * modified by the driver.
819 		 */
820 
821 		data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
822 		data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
823 
824 		data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
825 		data->rxfree++;
826 		done++;
827 	}
828 
829 	if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
830 			   TSI108_EC_RXSTAT_QUEUE0))
831 		tsi108_restart_rx(data, dev);
832 
833 	return done;
834 }
835 
tsi108_poll(struct napi_struct * napi,int budget)836 static int tsi108_poll(struct napi_struct *napi, int budget)
837 {
838 	struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
839 	struct net_device *dev = data->dev;
840 	u32 estat = TSI_READ(TSI108_EC_RXESTAT);
841 	u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
842 	int num_received = 0, num_filled = 0;
843 
844 	intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
845 	    TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
846 
847 	TSI_WRITE(TSI108_EC_RXESTAT, estat);
848 	TSI_WRITE(TSI108_EC_INTSTAT, intstat);
849 
850 	if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
851 		num_received = tsi108_complete_rx(dev, budget);
852 
853 	/* This should normally fill no more slots than the number of
854 	 * packets received in tsi108_complete_rx().  The exception
855 	 * is when we previously ran out of memory for RX SKBs.  In that
856 	 * case, it's helpful to obey the budget, not only so that the
857 	 * CPU isn't hogged, but so that memory (which may still be low)
858 	 * is not hogged by one device.
859 	 *
860 	 * A work unit is considered to be two SKBs to allow us to catch
861 	 * up when the ring has shrunk due to out-of-memory but we're
862 	 * still removing the full budget's worth of packets each time.
863 	 */
864 
865 	if (data->rxfree < TSI108_RXRING_LEN)
866 		num_filled = tsi108_refill_rx(dev, budget * 2);
867 
868 	if (intstat & TSI108_INT_RXERROR) {
869 		u32 err = TSI_READ(TSI108_EC_RXERR);
870 		TSI_WRITE(TSI108_EC_RXERR, err);
871 
872 		if (err) {
873 			if (net_ratelimit())
874 				printk(KERN_DEBUG "%s: RX error %x\n",
875 				       dev->name, err);
876 
877 			if (!(TSI_READ(TSI108_EC_RXSTAT) &
878 			      TSI108_EC_RXSTAT_QUEUE0))
879 				tsi108_restart_rx(data, dev);
880 		}
881 	}
882 
883 	if (intstat & TSI108_INT_RXOVERRUN) {
884 		spin_lock_irq(&data->misclock);
885 		data->stats.rx_fifo_errors++;
886 		spin_unlock_irq(&data->misclock);
887 	}
888 
889 	if (num_received < budget) {
890 		data->rxpending = 0;
891 		netif_rx_complete(napi);
892 
893 		TSI_WRITE(TSI108_EC_INTMASK,
894 				     TSI_READ(TSI108_EC_INTMASK)
895 				     & ~(TSI108_INT_RXQUEUE0
896 					 | TSI108_INT_RXTHRESH |
897 					 TSI108_INT_RXOVERRUN |
898 					 TSI108_INT_RXERROR |
899 					 TSI108_INT_RXWAIT));
900 	} else {
901 		data->rxpending = 1;
902 	}
903 
904 	return num_received;
905 }
906 
tsi108_rx_int(struct net_device * dev)907 static void tsi108_rx_int(struct net_device *dev)
908 {
909 	struct tsi108_prv_data *data = netdev_priv(dev);
910 
911 	/* A race could cause dev to already be scheduled, so it's not an
912 	 * error if that happens (and interrupts shouldn't be re-masked,
913 	 * because that can cause harmful races, if poll has already
914 	 * unmasked them but not cleared LINK_STATE_SCHED).
915 	 *
916 	 * This can happen if this code races with tsi108_poll(), which masks
917 	 * the interrupts after tsi108_irq_one() read the mask, but before
918 	 * netif_rx_schedule is called.  It could also happen due to calls
919 	 * from tsi108_check_rxring().
920 	 */
921 
922 	if (netif_rx_schedule_prep(&data->napi)) {
923 		/* Mask, rather than ack, the receive interrupts.  The ack
924 		 * will happen in tsi108_poll().
925 		 */
926 
927 		TSI_WRITE(TSI108_EC_INTMASK,
928 				     TSI_READ(TSI108_EC_INTMASK) |
929 				     TSI108_INT_RXQUEUE0
930 				     | TSI108_INT_RXTHRESH |
931 				     TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
932 				     TSI108_INT_RXWAIT);
933 		__netif_rx_schedule(&data->napi);
934 	} else {
935 		if (!netif_running(dev)) {
936 			/* This can happen if an interrupt occurs while the
937 			 * interface is being brought down, as the START
938 			 * bit is cleared before the stop function is called.
939 			 *
940 			 * In this case, the interrupts must be masked, or
941 			 * they will continue indefinitely.
942 			 *
943 			 * There's a race here if the interface is brought down
944 			 * and then up in rapid succession, as the device could
945 			 * be made running after the above check and before
946 			 * the masking below.  This will only happen if the IRQ
947 			 * thread has a lower priority than the task brining
948 			 * up the interface.  Fixing this race would likely
949 			 * require changes in generic code.
950 			 */
951 
952 			TSI_WRITE(TSI108_EC_INTMASK,
953 					     TSI_READ
954 					     (TSI108_EC_INTMASK) |
955 					     TSI108_INT_RXQUEUE0 |
956 					     TSI108_INT_RXTHRESH |
957 					     TSI108_INT_RXOVERRUN |
958 					     TSI108_INT_RXERROR |
959 					     TSI108_INT_RXWAIT);
960 		}
961 	}
962 }
963 
964 /* If the RX ring has run out of memory, try periodically
965  * to allocate some more, as otherwise poll would never
966  * get called (apart from the initial end-of-queue condition).
967  *
968  * This is called once per second (by default) from the thread.
969  */
970 
tsi108_check_rxring(struct net_device * dev)971 static void tsi108_check_rxring(struct net_device *dev)
972 {
973 	struct tsi108_prv_data *data = netdev_priv(dev);
974 
975 	/* A poll is scheduled, as opposed to caling tsi108_refill_rx
976 	 * directly, so as to keep the receive path single-threaded
977 	 * (and thus not needing a lock).
978 	 */
979 
980 	if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
981 		tsi108_rx_int(dev);
982 }
983 
tsi108_tx_int(struct net_device * dev)984 static void tsi108_tx_int(struct net_device *dev)
985 {
986 	struct tsi108_prv_data *data = netdev_priv(dev);
987 	u32 estat = TSI_READ(TSI108_EC_TXESTAT);
988 
989 	TSI_WRITE(TSI108_EC_TXESTAT, estat);
990 	TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
991 			     TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
992 	if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
993 		u32 err = TSI_READ(TSI108_EC_TXERR);
994 		TSI_WRITE(TSI108_EC_TXERR, err);
995 
996 		if (err && net_ratelimit())
997 			printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
998 	}
999 
1000 	if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
1001 		spin_lock(&data->txlock);
1002 		tsi108_complete_tx(dev);
1003 		spin_unlock(&data->txlock);
1004 	}
1005 }
1006 
1007 
tsi108_irq(int irq,void * dev_id)1008 static irqreturn_t tsi108_irq(int irq, void *dev_id)
1009 {
1010 	struct net_device *dev = dev_id;
1011 	struct tsi108_prv_data *data = netdev_priv(dev);
1012 	u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1013 
1014 	if (!(stat & TSI108_INT_ANY))
1015 		return IRQ_NONE;	/* Not our interrupt */
1016 
1017 	stat &= ~TSI_READ(TSI108_EC_INTMASK);
1018 
1019 	if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1020 		    TSI108_INT_TXERROR))
1021 		tsi108_tx_int(dev);
1022 	if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1023 		    TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1024 		    TSI108_INT_RXERROR))
1025 		tsi108_rx_int(dev);
1026 
1027 	if (stat & TSI108_INT_SFN) {
1028 		if (net_ratelimit())
1029 			printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1030 		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1031 	}
1032 
1033 	if (stat & TSI108_INT_STATCARRY) {
1034 		tsi108_stat_carry(dev);
1035 		TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1036 	}
1037 
1038 	return IRQ_HANDLED;
1039 }
1040 
tsi108_stop_ethernet(struct net_device * dev)1041 static void tsi108_stop_ethernet(struct net_device *dev)
1042 {
1043 	struct tsi108_prv_data *data = netdev_priv(dev);
1044 	int i = 1000;
1045 	/* Disable all TX and RX queues ... */
1046 	TSI_WRITE(TSI108_EC_TXCTRL, 0);
1047 	TSI_WRITE(TSI108_EC_RXCTRL, 0);
1048 
1049 	/* ...and wait for them to become idle */
1050 	while(i--) {
1051 		if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1052 			break;
1053 		udelay(10);
1054 	}
1055 	i = 1000;
1056 	while(i--){
1057 		if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1058 			return;
1059 		udelay(10);
1060 	}
1061 	printk(KERN_ERR "%s function time out \n", __func__);
1062 }
1063 
tsi108_reset_ether(struct tsi108_prv_data * data)1064 static void tsi108_reset_ether(struct tsi108_prv_data * data)
1065 {
1066 	TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1067 	udelay(100);
1068 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1069 
1070 	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1071 	udelay(100);
1072 	TSI_WRITE(TSI108_EC_PORTCTRL,
1073 			     TSI_READ(TSI108_EC_PORTCTRL) &
1074 			     ~TSI108_EC_PORTCTRL_STATRST);
1075 
1076 	TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1077 	udelay(100);
1078 	TSI_WRITE(TSI108_EC_TXCFG,
1079 			     TSI_READ(TSI108_EC_TXCFG) &
1080 			     ~TSI108_EC_TXCFG_RST);
1081 
1082 	TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1083 	udelay(100);
1084 	TSI_WRITE(TSI108_EC_RXCFG,
1085 			     TSI_READ(TSI108_EC_RXCFG) &
1086 			     ~TSI108_EC_RXCFG_RST);
1087 
1088 	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1089 			     TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1090 			     TSI108_MAC_MII_MGMT_RST);
1091 	udelay(100);
1092 	TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1093 			     (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1094 			     ~(TSI108_MAC_MII_MGMT_RST |
1095 			       TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1096 }
1097 
tsi108_get_mac(struct net_device * dev)1098 static int tsi108_get_mac(struct net_device *dev)
1099 {
1100 	struct tsi108_prv_data *data = netdev_priv(dev);
1101 	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1102 	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1103 
1104 	/* Note that the octets are reversed from what the manual says,
1105 	 * producing an even weirder ordering...
1106 	 */
1107 	if (word2 == 0 && word1 == 0) {
1108 		dev->dev_addr[0] = 0x00;
1109 		dev->dev_addr[1] = 0x06;
1110 		dev->dev_addr[2] = 0xd2;
1111 		dev->dev_addr[3] = 0x00;
1112 		dev->dev_addr[4] = 0x00;
1113 		if (0x8 == data->phy)
1114 			dev->dev_addr[5] = 0x01;
1115 		else
1116 			dev->dev_addr[5] = 0x02;
1117 
1118 		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1119 
1120 		word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1121 		    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1122 
1123 		TSI_WRITE(TSI108_MAC_ADDR1, word1);
1124 		TSI_WRITE(TSI108_MAC_ADDR2, word2);
1125 	} else {
1126 		dev->dev_addr[0] = (word2 >> 16) & 0xff;
1127 		dev->dev_addr[1] = (word2 >> 24) & 0xff;
1128 		dev->dev_addr[2] = (word1 >> 0) & 0xff;
1129 		dev->dev_addr[3] = (word1 >> 8) & 0xff;
1130 		dev->dev_addr[4] = (word1 >> 16) & 0xff;
1131 		dev->dev_addr[5] = (word1 >> 24) & 0xff;
1132 	}
1133 
1134 	if (!is_valid_ether_addr(dev->dev_addr)) {
1135 		printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
1136 		return -EINVAL;
1137 	}
1138 
1139 	return 0;
1140 }
1141 
tsi108_set_mac(struct net_device * dev,void * addr)1142 static int tsi108_set_mac(struct net_device *dev, void *addr)
1143 {
1144 	struct tsi108_prv_data *data = netdev_priv(dev);
1145 	u32 word1, word2;
1146 	int i;
1147 
1148 	if (!is_valid_ether_addr(addr))
1149 		return -EINVAL;
1150 
1151 	for (i = 0; i < 6; i++)
1152 		/* +2 is for the offset of the HW addr type */
1153 		dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1154 
1155 	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1156 
1157 	word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1158 	    (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1159 
1160 	spin_lock_irq(&data->misclock);
1161 	TSI_WRITE(TSI108_MAC_ADDR1, word1);
1162 	TSI_WRITE(TSI108_MAC_ADDR2, word2);
1163 	spin_lock(&data->txlock);
1164 
1165 	if (data->txfree && data->link_up)
1166 		netif_wake_queue(dev);
1167 
1168 	spin_unlock(&data->txlock);
1169 	spin_unlock_irq(&data->misclock);
1170 	return 0;
1171 }
1172 
1173 /* Protected by dev->xmit_lock. */
tsi108_set_rx_mode(struct net_device * dev)1174 static void tsi108_set_rx_mode(struct net_device *dev)
1175 {
1176 	struct tsi108_prv_data *data = netdev_priv(dev);
1177 	u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1178 
1179 	if (dev->flags & IFF_PROMISC) {
1180 		rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1181 		rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1182 		goto out;
1183 	}
1184 
1185 	rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1186 
1187 	if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
1188 		int i;
1189 		struct dev_mc_list *mc = dev->mc_list;
1190 		rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1191 
1192 		memset(data->mc_hash, 0, sizeof(data->mc_hash));
1193 
1194 		while (mc) {
1195 			u32 hash, crc;
1196 
1197 			if (mc->dmi_addrlen == 6) {
1198 				crc = ether_crc(6, mc->dmi_addr);
1199 				hash = crc >> 23;
1200 
1201 				__set_bit(hash, &data->mc_hash[0]);
1202 			} else {
1203 				printk(KERN_ERR
1204 				       "%s: got multicast address of length %d "
1205 				       "instead of 6.\n", dev->name,
1206 				       mc->dmi_addrlen);
1207 			}
1208 
1209 			mc = mc->next;
1210 		}
1211 
1212 		TSI_WRITE(TSI108_EC_HASHADDR,
1213 				     TSI108_EC_HASHADDR_AUTOINC |
1214 				     TSI108_EC_HASHADDR_MCAST);
1215 
1216 		for (i = 0; i < 16; i++) {
1217 			/* The manual says that the hardware may drop
1218 			 * back-to-back writes to the data register.
1219 			 */
1220 			udelay(1);
1221 			TSI_WRITE(TSI108_EC_HASHDATA,
1222 					     data->mc_hash[i]);
1223 		}
1224 	}
1225 
1226       out:
1227 	TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1228 }
1229 
tsi108_init_phy(struct net_device * dev)1230 static void tsi108_init_phy(struct net_device *dev)
1231 {
1232 	struct tsi108_prv_data *data = netdev_priv(dev);
1233 	u32 i = 0;
1234 	u16 phyval = 0;
1235 	unsigned long flags;
1236 
1237 	spin_lock_irqsave(&phy_lock, flags);
1238 
1239 	tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1240 	while (--i) {
1241 		if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1242 			break;
1243 		udelay(10);
1244 	}
1245 	if (i == 0)
1246 		printk(KERN_ERR "%s function time out \n", __func__);
1247 
1248 	if (data->phy_type == TSI108_PHY_BCM54XX) {
1249 		tsi108_write_mii(data, 0x09, 0x0300);
1250 		tsi108_write_mii(data, 0x10, 0x1020);
1251 		tsi108_write_mii(data, 0x1c, 0x8c00);
1252 	}
1253 
1254 	tsi108_write_mii(data,
1255 			 MII_BMCR,
1256 			 BMCR_ANENABLE | BMCR_ANRESTART);
1257 	while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1258 		cpu_relax();
1259 
1260 	/* Set G/MII mode and receive clock select in TBI control #2.  The
1261 	 * second port won't work if this isn't done, even though we don't
1262 	 * use TBI mode.
1263 	 */
1264 
1265 	tsi108_write_tbi(data, 0x11, 0x30);
1266 
1267 	/* FIXME: It seems to take more than 2 back-to-back reads to the
1268 	 * PHY_STAT register before the link up status bit is set.
1269 	 */
1270 
1271 	data->link_up = 0;
1272 
1273 	while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1274 		 BMSR_LSTATUS)) {
1275 		if (i++ > (MII_READ_DELAY / 10)) {
1276 			break;
1277 		}
1278 		spin_unlock_irqrestore(&phy_lock, flags);
1279 		msleep(10);
1280 		spin_lock_irqsave(&phy_lock, flags);
1281 	}
1282 
1283 	data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1284 	printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1285 	data->phy_ok = 1;
1286 	data->init_media = 1;
1287 	spin_unlock_irqrestore(&phy_lock, flags);
1288 }
1289 
tsi108_kill_phy(struct net_device * dev)1290 static void tsi108_kill_phy(struct net_device *dev)
1291 {
1292 	struct tsi108_prv_data *data = netdev_priv(dev);
1293 	unsigned long flags;
1294 
1295 	spin_lock_irqsave(&phy_lock, flags);
1296 	tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1297 	data->phy_ok = 0;
1298 	spin_unlock_irqrestore(&phy_lock, flags);
1299 }
1300 
tsi108_open(struct net_device * dev)1301 static int tsi108_open(struct net_device *dev)
1302 {
1303 	int i;
1304 	struct tsi108_prv_data *data = netdev_priv(dev);
1305 	unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1306 	unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1307 
1308 	i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1309 	if (i != 0) {
1310 		printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1311 		       data->id, data->irq_num);
1312 		return i;
1313 	} else {
1314 		dev->irq = data->irq_num;
1315 		printk(KERN_NOTICE
1316 		       "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1317 		       data->id, dev->irq, dev->name);
1318 	}
1319 
1320 	data->rxring = dma_alloc_coherent(NULL, rxring_size,
1321 			&data->rxdma, GFP_KERNEL);
1322 
1323 	if (!data->rxring) {
1324 		printk(KERN_DEBUG
1325 		       "TSI108_ETH: failed to allocate memory for rxring!\n");
1326 		return -ENOMEM;
1327 	} else {
1328 		memset(data->rxring, 0, rxring_size);
1329 	}
1330 
1331 	data->txring = dma_alloc_coherent(NULL, txring_size,
1332 			&data->txdma, GFP_KERNEL);
1333 
1334 	if (!data->txring) {
1335 		printk(KERN_DEBUG
1336 		       "TSI108_ETH: failed to allocate memory for txring!\n");
1337 		pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
1338 		return -ENOMEM;
1339 	} else {
1340 		memset(data->txring, 0, txring_size);
1341 	}
1342 
1343 	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1344 		data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1345 		data->rxring[i].blen = TSI108_RXBUF_SIZE;
1346 		data->rxring[i].vlan = 0;
1347 	}
1348 
1349 	data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1350 
1351 	data->rxtail = 0;
1352 	data->rxhead = 0;
1353 
1354 	for (i = 0; i < TSI108_RXRING_LEN; i++) {
1355 		struct sk_buff *skb;
1356 
1357 		skb = netdev_alloc_skb(dev, TSI108_RXBUF_SIZE + NET_IP_ALIGN);
1358 		if (!skb) {
1359 			/* Bah.  No memory for now, but maybe we'll get
1360 			 * some more later.
1361 			 * For now, we'll live with the smaller ring.
1362 			 */
1363 			printk(KERN_WARNING
1364 			       "%s: Could only allocate %d receive skb(s).\n",
1365 			       dev->name, i);
1366 			data->rxhead = i;
1367 			break;
1368 		}
1369 
1370 		data->rxskbs[i] = skb;
1371 		/* Align the payload on a 4-byte boundary */
1372 		skb_reserve(skb, 2);
1373 		data->rxskbs[i] = skb;
1374 		data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1375 		data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1376 	}
1377 
1378 	data->rxfree = i;
1379 	TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1380 
1381 	for (i = 0; i < TSI108_TXRING_LEN; i++) {
1382 		data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1383 		data->txring[i].misc = 0;
1384 	}
1385 
1386 	data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1387 	data->txtail = 0;
1388 	data->txhead = 0;
1389 	data->txfree = TSI108_TXRING_LEN;
1390 	TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1391 	tsi108_init_phy(dev);
1392 
1393 	napi_enable(&data->napi);
1394 
1395 	setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1396 	mod_timer(&data->timer, jiffies + 1);
1397 
1398 	tsi108_restart_rx(data, dev);
1399 
1400 	TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1401 
1402 	TSI_WRITE(TSI108_EC_INTMASK,
1403 			     ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1404 			       TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1405 			       TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1406 			       TSI108_INT_SFN | TSI108_INT_STATCARRY));
1407 
1408 	TSI_WRITE(TSI108_MAC_CFG1,
1409 			     TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1410 	netif_start_queue(dev);
1411 	return 0;
1412 }
1413 
tsi108_close(struct net_device * dev)1414 static int tsi108_close(struct net_device *dev)
1415 {
1416 	struct tsi108_prv_data *data = netdev_priv(dev);
1417 
1418 	netif_stop_queue(dev);
1419 	napi_disable(&data->napi);
1420 
1421 	del_timer_sync(&data->timer);
1422 
1423 	tsi108_stop_ethernet(dev);
1424 	tsi108_kill_phy(dev);
1425 	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1426 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1427 
1428 	/* Check for any pending TX packets, and drop them. */
1429 
1430 	while (!data->txfree || data->txhead != data->txtail) {
1431 		int tx = data->txtail;
1432 		struct sk_buff *skb;
1433 		skb = data->txskbs[tx];
1434 		data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1435 		data->txfree++;
1436 		dev_kfree_skb(skb);
1437 	}
1438 
1439 	free_irq(data->irq_num, dev);
1440 
1441 	/* Discard the RX ring. */
1442 
1443 	while (data->rxfree) {
1444 		int rx = data->rxtail;
1445 		struct sk_buff *skb;
1446 
1447 		skb = data->rxskbs[rx];
1448 		data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1449 		data->rxfree--;
1450 		dev_kfree_skb(skb);
1451 	}
1452 
1453 	dma_free_coherent(0,
1454 			    TSI108_RXRING_LEN * sizeof(rx_desc),
1455 			    data->rxring, data->rxdma);
1456 	dma_free_coherent(0,
1457 			    TSI108_TXRING_LEN * sizeof(tx_desc),
1458 			    data->txring, data->txdma);
1459 
1460 	return 0;
1461 }
1462 
tsi108_init_mac(struct net_device * dev)1463 static void tsi108_init_mac(struct net_device *dev)
1464 {
1465 	struct tsi108_prv_data *data = netdev_priv(dev);
1466 
1467 	TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1468 			     TSI108_MAC_CFG2_PADCRC);
1469 
1470 	TSI_WRITE(TSI108_EC_TXTHRESH,
1471 			     (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1472 			     (192 << TSI108_EC_TXTHRESH_STOPFILL));
1473 
1474 	TSI_WRITE(TSI108_STAT_CARRYMASK1,
1475 			     ~(TSI108_STAT_CARRY1_RXBYTES |
1476 			       TSI108_STAT_CARRY1_RXPKTS |
1477 			       TSI108_STAT_CARRY1_RXFCS |
1478 			       TSI108_STAT_CARRY1_RXMCAST |
1479 			       TSI108_STAT_CARRY1_RXALIGN |
1480 			       TSI108_STAT_CARRY1_RXLENGTH |
1481 			       TSI108_STAT_CARRY1_RXRUNT |
1482 			       TSI108_STAT_CARRY1_RXJUMBO |
1483 			       TSI108_STAT_CARRY1_RXFRAG |
1484 			       TSI108_STAT_CARRY1_RXJABBER |
1485 			       TSI108_STAT_CARRY1_RXDROP));
1486 
1487 	TSI_WRITE(TSI108_STAT_CARRYMASK2,
1488 			     ~(TSI108_STAT_CARRY2_TXBYTES |
1489 			       TSI108_STAT_CARRY2_TXPKTS |
1490 			       TSI108_STAT_CARRY2_TXEXDEF |
1491 			       TSI108_STAT_CARRY2_TXEXCOL |
1492 			       TSI108_STAT_CARRY2_TXTCOL |
1493 			       TSI108_STAT_CARRY2_TXPAUSE));
1494 
1495 	TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1496 	TSI_WRITE(TSI108_MAC_CFG1, 0);
1497 
1498 	TSI_WRITE(TSI108_EC_RXCFG,
1499 			     TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1500 
1501 	TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1502 			     TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1503 			     TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1504 						TSI108_EC_TXQ_CFG_SFNPORT));
1505 
1506 	TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1507 			     TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1508 			     TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1509 						TSI108_EC_RXQ_CFG_SFNPORT));
1510 
1511 	TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1512 			     TSI108_EC_TXQ_BUFCFG_BURST256 |
1513 			     TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1514 						TSI108_EC_TXQ_BUFCFG_SFNPORT));
1515 
1516 	TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1517 			     TSI108_EC_RXQ_BUFCFG_BURST256 |
1518 			     TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1519 						TSI108_EC_RXQ_BUFCFG_SFNPORT));
1520 
1521 	TSI_WRITE(TSI108_EC_INTMASK, ~0);
1522 }
1523 
tsi108_get_settings(struct net_device * dev,struct ethtool_cmd * cmd)1524 static int tsi108_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1525 {
1526 	struct tsi108_prv_data *data = netdev_priv(dev);
1527 	unsigned long flags;
1528 	int rc;
1529 
1530 	spin_lock_irqsave(&data->txlock, flags);
1531 	rc = mii_ethtool_gset(&data->mii_if, cmd);
1532 	spin_unlock_irqrestore(&data->txlock, flags);
1533 
1534 	return rc;
1535 }
1536 
tsi108_set_settings(struct net_device * dev,struct ethtool_cmd * cmd)1537 static int tsi108_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1538 {
1539 	struct tsi108_prv_data *data = netdev_priv(dev);
1540 	unsigned long flags;
1541 	int rc;
1542 
1543 	spin_lock_irqsave(&data->txlock, flags);
1544 	rc = mii_ethtool_sset(&data->mii_if, cmd);
1545 	spin_unlock_irqrestore(&data->txlock, flags);
1546 
1547 	return rc;
1548 }
1549 
tsi108_do_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1550 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1551 {
1552 	struct tsi108_prv_data *data = netdev_priv(dev);
1553 	if (!netif_running(dev))
1554 		return -EINVAL;
1555 	return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1556 }
1557 
1558 static const struct ethtool_ops tsi108_ethtool_ops = {
1559 	.get_link 	= ethtool_op_get_link,
1560 	.get_settings	= tsi108_get_settings,
1561 	.set_settings	= tsi108_set_settings,
1562 };
1563 
1564 static int
tsi108_init_one(struct platform_device * pdev)1565 tsi108_init_one(struct platform_device *pdev)
1566 {
1567 	struct net_device *dev = NULL;
1568 	struct tsi108_prv_data *data = NULL;
1569 	hw_info *einfo;
1570 	int err = 0;
1571 
1572 	einfo = pdev->dev.platform_data;
1573 
1574 	if (NULL == einfo) {
1575 		printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1576 		       pdev->id);
1577 		return -ENODEV;
1578 	}
1579 
1580 	/* Create an ethernet device instance */
1581 
1582 	dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1583 	if (!dev) {
1584 		printk("tsi108_eth: Could not allocate a device structure\n");
1585 		return -ENOMEM;
1586 	}
1587 
1588 	printk("tsi108_eth%d: probe...\n", pdev->id);
1589 	data = netdev_priv(dev);
1590 	data->dev = dev;
1591 
1592 	pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1593 			pdev->id, einfo->regs, einfo->phyregs,
1594 			einfo->phy, einfo->irq_num);
1595 
1596 	data->regs = ioremap(einfo->regs, 0x400);
1597 	if (NULL == data->regs) {
1598 		err = -ENOMEM;
1599 		goto regs_fail;
1600 	}
1601 
1602 	data->phyregs = ioremap(einfo->phyregs, 0x400);
1603 	if (NULL == data->phyregs) {
1604 		err = -ENOMEM;
1605 		goto regs_fail;
1606 	}
1607 /* MII setup */
1608 	data->mii_if.dev = dev;
1609 	data->mii_if.mdio_read = tsi108_mdio_read;
1610 	data->mii_if.mdio_write = tsi108_mdio_write;
1611 	data->mii_if.phy_id = einfo->phy;
1612 	data->mii_if.phy_id_mask = 0x1f;
1613 	data->mii_if.reg_num_mask = 0x1f;
1614 
1615 	data->phy = einfo->phy;
1616 	data->phy_type = einfo->phy_type;
1617 	data->irq_num = einfo->irq_num;
1618 	data->id = pdev->id;
1619 	dev->open = tsi108_open;
1620 	dev->stop = tsi108_close;
1621 	dev->hard_start_xmit = tsi108_send_packet;
1622 	dev->set_mac_address = tsi108_set_mac;
1623 	dev->set_multicast_list = tsi108_set_rx_mode;
1624 	dev->get_stats = tsi108_get_stats;
1625 	netif_napi_add(dev, &data->napi, tsi108_poll, 64);
1626 	dev->do_ioctl = tsi108_do_ioctl;
1627 	dev->ethtool_ops = &tsi108_ethtool_ops;
1628 
1629 	/* Apparently, the Linux networking code won't use scatter-gather
1630 	 * if the hardware doesn't do checksums.  However, it's faster
1631 	 * to checksum in place and use SG, as (among other reasons)
1632 	 * the cache won't be dirtied (which then has to be flushed
1633 	 * before DMA).  The checksumming is done by the driver (via
1634 	 * a new function skb_csum_dev() in net/core/skbuff.c).
1635 	 */
1636 
1637 	dev->features = NETIF_F_HIGHDMA;
1638 
1639 	spin_lock_init(&data->txlock);
1640 	spin_lock_init(&data->misclock);
1641 
1642 	tsi108_reset_ether(data);
1643 	tsi108_kill_phy(dev);
1644 
1645 	if ((err = tsi108_get_mac(dev)) != 0) {
1646 		printk(KERN_ERR "%s: Invalid MAC address.  Please correct.\n",
1647 		       dev->name);
1648 		goto register_fail;
1649 	}
1650 
1651 	tsi108_init_mac(dev);
1652 	err = register_netdev(dev);
1653 	if (err) {
1654 		printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1655 				dev->name);
1656 		goto register_fail;
1657 	}
1658 
1659 	platform_set_drvdata(pdev, dev);
1660 	printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
1661 	       dev->name, dev->dev_addr);
1662 #ifdef DEBUG
1663 	data->msg_enable = DEBUG;
1664 	dump_eth_one(dev);
1665 #endif
1666 
1667 	return 0;
1668 
1669 register_fail:
1670 	iounmap(data->regs);
1671 	iounmap(data->phyregs);
1672 
1673 regs_fail:
1674 	free_netdev(dev);
1675 	return err;
1676 }
1677 
1678 /* There's no way to either get interrupts from the PHY when
1679  * something changes, or to have the Tsi108 automatically communicate
1680  * with the PHY to reconfigure itself.
1681  *
1682  * Thus, we have to do it using a timer.
1683  */
1684 
tsi108_timed_checker(unsigned long dev_ptr)1685 static void tsi108_timed_checker(unsigned long dev_ptr)
1686 {
1687 	struct net_device *dev = (struct net_device *)dev_ptr;
1688 	struct tsi108_prv_data *data = netdev_priv(dev);
1689 
1690 	tsi108_check_phy(dev);
1691 	tsi108_check_rxring(dev);
1692 	mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1693 }
1694 
tsi108_ether_init(void)1695 static int tsi108_ether_init(void)
1696 {
1697 	int ret;
1698 	ret = platform_driver_register (&tsi_eth_driver);
1699 	if (ret < 0){
1700 		printk("tsi108_ether_init: error initializing ethernet "
1701 		       "device\n");
1702 		return ret;
1703 	}
1704 	return 0;
1705 }
1706 
tsi108_ether_remove(struct platform_device * pdev)1707 static int tsi108_ether_remove(struct platform_device *pdev)
1708 {
1709 	struct net_device *dev = platform_get_drvdata(pdev);
1710 	struct tsi108_prv_data *priv = netdev_priv(dev);
1711 
1712 	unregister_netdev(dev);
1713 	tsi108_stop_ethernet(dev);
1714 	platform_set_drvdata(pdev, NULL);
1715 	iounmap(priv->regs);
1716 	iounmap(priv->phyregs);
1717 	free_netdev(dev);
1718 
1719 	return 0;
1720 }
tsi108_ether_exit(void)1721 static void tsi108_ether_exit(void)
1722 {
1723 	platform_driver_unregister(&tsi_eth_driver);
1724 }
1725 
1726 module_init(tsi108_ether_init);
1727 module_exit(tsi108_ether_exit);
1728 
1729 MODULE_AUTHOR("Tundra Semiconductor Corporation");
1730 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1731 MODULE_LICENSE("GPL");
1732 MODULE_ALIAS("platform:tsi-ethernet");
1733