1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26
27 #include <media/v4l2-common.h>
28 #include <media/tuner.h>
29 #include <media/tveeprom.h>
30 #include <media/videobuf-dma-sg.h>
31 #include <media/videobuf-dvb.h>
32
33 #include "btcx-risc.h"
34 #include "cx23885-reg.h"
35 #include "media/cx2341x.h"
36
37 #include <linux/version.h>
38 #include <linux/mutex.h>
39
40 #define CX23885_VERSION_CODE KERNEL_VERSION(0, 0, 1)
41
42 #define UNSET (-1U)
43
44 #define CX23885_MAXBOARDS 8
45
46 /* Max number of inputs by card */
47 #define MAX_CX23885_INPUT 8
48 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
49 #define RESOURCE_OVERLAY 1
50 #define RESOURCE_VIDEO 2
51 #define RESOURCE_VBI 4
52
53 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
54
55 #define CX23885_BOARD_NOAUTO UNSET
56 #define CX23885_BOARD_UNKNOWN 0
57 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
59 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
60 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
61 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
63 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
64 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
65 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
66 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
68 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
69 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
70
71 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
72 #define CX23885_NORMS (\
73 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
74 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
75 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
76 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
77
78 struct cx23885_fmt {
79 char *name;
80 u32 fourcc; /* v4l2 format id */
81 int depth;
82 int flags;
83 u32 cxformat;
84 };
85
86 struct cx23885_ctrl {
87 struct v4l2_queryctrl v;
88 u32 off;
89 u32 reg;
90 u32 mask;
91 u32 shift;
92 };
93
94 struct cx23885_tvnorm {
95 char *name;
96 v4l2_std_id id;
97 u32 cxiformat;
98 u32 cxoformat;
99 };
100
101 struct cx23885_fh {
102 struct cx23885_dev *dev;
103 enum v4l2_buf_type type;
104 int radio;
105 u32 resources;
106
107 /* video overlay */
108 struct v4l2_window win;
109 struct v4l2_clip *clips;
110 unsigned int nclips;
111
112 /* video capture */
113 struct cx23885_fmt *fmt;
114 unsigned int width, height;
115
116 /* vbi capture */
117 struct videobuf_queue vidq;
118 struct videobuf_queue vbiq;
119
120 /* MPEG Encoder specifics ONLY */
121 struct videobuf_queue mpegq;
122 atomic_t v4l_reading;
123 };
124
125 enum cx23885_itype {
126 CX23885_VMUX_COMPOSITE1 = 1,
127 CX23885_VMUX_COMPOSITE2,
128 CX23885_VMUX_COMPOSITE3,
129 CX23885_VMUX_COMPOSITE4,
130 CX23885_VMUX_SVIDEO,
131 CX23885_VMUX_TELEVISION,
132 CX23885_VMUX_CABLE,
133 CX23885_VMUX_DVB,
134 CX23885_VMUX_DEBUG,
135 CX23885_RADIO,
136 };
137
138 enum cx23885_src_sel_type {
139 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
140 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
141 };
142
143 /* buffer for one video frame */
144 struct cx23885_buffer {
145 /* common v4l buffer stuff -- must be first */
146 struct videobuf_buffer vb;
147
148 /* cx23885 specific */
149 unsigned int bpl;
150 struct btcx_riscmem risc;
151 struct cx23885_fmt *fmt;
152 u32 count;
153 };
154
155 struct cx23885_input {
156 enum cx23885_itype type;
157 unsigned int vmux;
158 u32 gpio0, gpio1, gpio2, gpio3;
159 };
160
161 typedef enum {
162 CX23885_MPEG_UNDEFINED = 0,
163 CX23885_MPEG_DVB,
164 CX23885_ANALOG_VIDEO,
165 CX23885_MPEG_ENCODER,
166 } port_t;
167
168 struct cx23885_board {
169 char *name;
170 port_t porta, portb, portc;
171 unsigned int tuner_type;
172 unsigned int radio_type;
173 unsigned char tuner_addr;
174 unsigned char radio_addr;
175
176 /* Vendors can and do run the PCIe bridge at different
177 * clock rates, driven physically by crystals on the PCBs.
178 * The core has to accomodate this. This allows the user
179 * to add new boards with new frequencys. The value is
180 * expressed in Hz.
181 *
182 * The core framework will default this value based on
183 * current designs, but it can vary.
184 */
185 u32 clk_freq;
186 struct cx23885_input input[MAX_CX23885_INPUT];
187 };
188
189 struct cx23885_subid {
190 u16 subvendor;
191 u16 subdevice;
192 u32 card;
193 };
194
195 struct cx23885_i2c {
196 struct cx23885_dev *dev;
197
198 int nr;
199
200 /* i2c i/o */
201 struct i2c_adapter i2c_adap;
202 struct i2c_algo_bit_data i2c_algo;
203 struct i2c_client i2c_client;
204 u32 i2c_rc;
205
206 /* 885 registers used for raw addess */
207 u32 i2c_period;
208 u32 reg_ctrl;
209 u32 reg_stat;
210 u32 reg_addr;
211 u32 reg_rdata;
212 u32 reg_wdata;
213 };
214
215 struct cx23885_dmaqueue {
216 struct list_head active;
217 struct list_head queued;
218 struct timer_list timeout;
219 struct btcx_riscmem stopper;
220 u32 count;
221 };
222
223 struct cx23885_tsport {
224 struct cx23885_dev *dev;
225
226 int nr;
227 int sram_chno;
228
229 struct videobuf_dvb_frontends frontends;
230
231 /* dma queues */
232 struct cx23885_dmaqueue mpegq;
233 u32 ts_packet_size;
234 u32 ts_packet_count;
235
236 int width;
237 int height;
238
239 spinlock_t slock;
240
241 /* registers */
242 u32 reg_gpcnt;
243 u32 reg_gpcnt_ctl;
244 u32 reg_dma_ctl;
245 u32 reg_lngth;
246 u32 reg_hw_sop_ctrl;
247 u32 reg_gen_ctrl;
248 u32 reg_bd_pkt_status;
249 u32 reg_sop_status;
250 u32 reg_fifo_ovfl_stat;
251 u32 reg_vld_misc;
252 u32 reg_ts_clk_en;
253 u32 reg_ts_int_msk;
254 u32 reg_ts_int_stat;
255 u32 reg_src_sel;
256
257 /* Default register vals */
258 int pci_irqmask;
259 u32 dma_ctl_val;
260 u32 ts_int_msk_val;
261 u32 gen_ctrl_val;
262 u32 ts_clk_en_val;
263 u32 src_sel_val;
264 u32 vld_misc_val;
265 u32 hw_sop_ctrl_val;
266
267 /* Allow a single tsport to have multiple frontends */
268 u32 num_frontends;
269 };
270
271 struct cx23885_dev {
272 struct list_head devlist;
273 atomic_t refcount;
274
275 /* pci stuff */
276 struct pci_dev *pci;
277 unsigned char pci_rev, pci_lat;
278 int pci_bus, pci_slot;
279 u32 __iomem *lmmio;
280 u8 __iomem *bmmio;
281 int pci_irqmask;
282 int hwrevision;
283
284 /* This valud is board specific and is used to configure the
285 * AV core so we see nice clean and stable video and audio. */
286 u32 clk_freq;
287
288 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
289 struct cx23885_i2c i2c_bus[3];
290
291 int nr;
292 struct mutex lock;
293
294 /* board details */
295 unsigned int board;
296 char name[32];
297
298 struct cx23885_tsport ts1, ts2;
299
300 /* sram configuration */
301 struct sram_channel *sram_channels;
302
303 enum {
304 CX23885_BRIDGE_UNDEFINED = 0,
305 CX23885_BRIDGE_885 = 885,
306 CX23885_BRIDGE_887 = 887,
307 } bridge;
308
309 /* Analog video */
310 u32 resources;
311 unsigned int input;
312 u32 tvaudio;
313 v4l2_std_id tvnorm;
314 unsigned int tuner_type;
315 unsigned char tuner_addr;
316 unsigned int radio_type;
317 unsigned char radio_addr;
318 unsigned int has_radio;
319
320 /* V4l */
321 u32 freq;
322 struct video_device *video_dev;
323 struct video_device *vbi_dev;
324 struct video_device *radio_dev;
325
326 struct cx23885_dmaqueue vidq;
327 struct cx23885_dmaqueue vbiq;
328 spinlock_t slock;
329
330 /* MPEG Encoder ONLY settings */
331 u32 cx23417_mailbox;
332 struct cx2341x_mpeg_params mpeg_params;
333 struct video_device *v4l_device;
334 atomic_t v4l_reader_count;
335 struct cx23885_tvnorm encodernorm;
336
337 };
338
339 extern struct list_head cx23885_devlist;
340
341 #define SRAM_CH01 0 /* Video A */
342 #define SRAM_CH02 1 /* VBI A */
343 #define SRAM_CH03 2 /* Video B */
344 #define SRAM_CH04 3 /* Transport via B */
345 #define SRAM_CH05 4 /* VBI B */
346 #define SRAM_CH06 5 /* Video C */
347 #define SRAM_CH07 6 /* Transport via C */
348 #define SRAM_CH08 7 /* Audio Internal A */
349 #define SRAM_CH09 8 /* Audio Internal B */
350 #define SRAM_CH10 9 /* Audio External */
351 #define SRAM_CH11 10 /* COMB_3D_N */
352 #define SRAM_CH12 11 /* Comb 3D N1 */
353 #define SRAM_CH13 12 /* Comb 3D N2 */
354 #define SRAM_CH14 13 /* MOE Vid */
355 #define SRAM_CH15 14 /* MOE RSLT */
356
357 struct sram_channel {
358 char *name;
359 u32 cmds_start;
360 u32 ctrl_start;
361 u32 cdt;
362 u32 fifo_start;;
363 u32 fifo_size;
364 u32 ptr1_reg;
365 u32 ptr2_reg;
366 u32 cnt1_reg;
367 u32 cnt2_reg;
368 u32 jumponly;
369 };
370
371 /* ----------------------------------------------------------- */
372
373 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
374 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
375
376 #define cx_andor(reg, mask, value) \
377 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
378 ((value) & (mask)), dev->lmmio+((reg)>>2))
379
380 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
381 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
382
383 /* ----------------------------------------------------------- */
384 /* cx23885-core.c */
385
386 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
387 struct sram_channel *ch,
388 unsigned int bpl, u32 risc);
389
390 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
391 struct sram_channel *ch);
392
393 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
394 u32 reg, u32 mask, u32 value);
395
396 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
397 struct scatterlist *sglist,
398 unsigned int top_offset, unsigned int bottom_offset,
399 unsigned int bpl, unsigned int padding, unsigned int lines);
400
401 void cx23885_cancel_buffers(struct cx23885_tsport *port);
402
403 extern int cx23885_restart_queue(struct cx23885_tsport *port,
404 struct cx23885_dmaqueue *q);
405
406 extern void cx23885_wakeup(struct cx23885_tsport *port,
407 struct cx23885_dmaqueue *q, u32 count);
408
409
410 /* ----------------------------------------------------------- */
411 /* cx23885-cards.c */
412 extern struct cx23885_board cx23885_boards[];
413 extern const unsigned int cx23885_bcount;
414
415 extern struct cx23885_subid cx23885_subids[];
416 extern const unsigned int cx23885_idcount;
417
418 extern int cx23885_tuner_callback(void *priv, int component,
419 int command, int arg);
420 extern void cx23885_card_list(struct cx23885_dev *dev);
421 extern int cx23885_ir_init(struct cx23885_dev *dev);
422 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
423 extern void cx23885_card_setup(struct cx23885_dev *dev);
424 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
425
426 extern int cx23885_dvb_register(struct cx23885_tsport *port);
427 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
428
429 extern int cx23885_buf_prepare(struct videobuf_queue *q,
430 struct cx23885_tsport *port,
431 struct cx23885_buffer *buf,
432 enum v4l2_field field);
433 extern void cx23885_buf_queue(struct cx23885_tsport *port,
434 struct cx23885_buffer *buf);
435 extern void cx23885_free_buffer(struct videobuf_queue *q,
436 struct cx23885_buffer *buf);
437
438 /* ----------------------------------------------------------- */
439 /* cx23885-video.c */
440 /* Video */
441 extern int cx23885_video_register(struct cx23885_dev *dev);
442 extern void cx23885_video_unregister(struct cx23885_dev *dev);
443 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
444
445 /* ----------------------------------------------------------- */
446 /* cx23885-vbi.c */
447 extern int cx23885_vbi_fmt(struct file *file, void *priv,
448 struct v4l2_format *f);
449 extern void cx23885_vbi_timeout(unsigned long data);
450 extern struct videobuf_queue_ops cx23885_vbi_qops;
451
452 /* cx23885-i2c.c */
453 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
454 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
455 extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
456 void *arg);
457 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
458
459 /* ----------------------------------------------------------- */
460 /* cx23885-417.c */
461 extern int cx23885_417_register(struct cx23885_dev *dev);
462 extern void cx23885_417_unregister(struct cx23885_dev *dev);
463 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
464 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
465 extern void cx23885_mc417_init(struct cx23885_dev *dev);
466 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
467 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
468
469
470 /* ----------------------------------------------------------- */
471 /* tv norms */
472
norm_maxw(v4l2_std_id norm)473 static inline unsigned int norm_maxw(v4l2_std_id norm)
474 {
475 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
476 }
477
norm_maxh(v4l2_std_id norm)478 static inline unsigned int norm_maxh(v4l2_std_id norm)
479 {
480 return (norm & V4L2_STD_625_50) ? 576 : 480;
481 }
482
norm_swidth(v4l2_std_id norm)483 static inline unsigned int norm_swidth(v4l2_std_id norm)
484 {
485 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
486 }
487