• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2   This is part of the rtl8180-sa2400 driver
3   released under the GPL (See file COPYING for details).
4   Copyright (c) 2005 Andrea Merello <andreamrl@tiscali.it>
5 
6   This files contains programming code for the rtl8225
7   radio frontend.
8 
9   *Many* thanks to Realtek Corp. for their great support!
10 
11 */
12 
13 
14 
15 #include "r8180_hw.h"
16 #include "r8180_rtl8225.h"
17 
18 
19 u8 rtl8225_gain[]={
20 	0x23,0x88,0x7c,0xa5,// -82dbm
21 	0x23,0x88,0x7c,0xb5,// -82dbm
22 	0x23,0x88,0x7c,0xc5,// -82dbm
23 	0x33,0x80,0x79,0xc5,// -78dbm
24 	0x43,0x78,0x76,0xc5,// -74dbm
25 	0x53,0x60,0x73,0xc5,// -70dbm
26 	0x63,0x58,0x70,0xc5,// -66dbm
27 };
28 
29 #if 0
30 u8 rtl8225_init_gain[]={
31 	//0x00,0x00,0x00,0x00,//0x00,0x00,0x00,0x00,
32 	0x33,0x80,0x6c,0xc5,//0x00,0x49,0x06,0xb5,//Gain = 0 ~ -78dbm
33 	0x43,0x78,0x69,0xc5,//0x00,0x45,0x06,0xb1,//Gain = 1 ~ -74dbm
34 	0x53,0x60,0x66,0xc5,//0x00,0x41,0x06,0xab,//Gain = 2 ~ -70dbm
35 	0x63,0x58,0x63,0xc5,//0x00,0x3d,0x06,0xa5,//Gain = 3 ~ -66dbm
36 	0x73,0x50,0x62,0xc5,//0x00,0x39,0x06,0xa1,//Gain = 4 ~ -62dbm
37 	0x83,0x43,0x61,0xc5,//0x00,0x35,0x06,0x9b,//Gain = 5 ~ -58dbm
38 	0x93,0x38,0x5a,0xc5,//0x00,0x31,0x06,0x99,//Gain = 6 ~ -54dbm
39 };
40 #endif
41 #ifdef CONFIG_RTL818X_S
42 u32 rtl8225_chan[] ={
43               0,
44 		0x0080, //ch1
45 		0x0100, //ch2
46 		0x0180, //ch3
47 		0x0200, //ch4
48 		0x0280,
49 		0x0300,
50 		0x0380,
51 		0x0400,
52 		0x0480,
53 		0x0500,
54 		0x0580,
55 		0x0600,
56 		0x0680,
57 		0x074A, //ch14
58 };
59 #else
60 u32 rtl8225_chan[] = {
61 	0,	//dummy channel 0
62 	0x085c, //1
63 	0x08dc, //2
64 	0x095c, //3
65 	0x09dc, //4
66 	0x0a5c, //5
67 	0x0adc, //6
68 	0x0b5c, //7
69 	0x0bdc, //8
70 	0x0c5c, //9
71 	0x0cdc, //10
72 	0x0d5c, //11
73 	0x0ddc, //12
74 	0x0e5c, //13
75 	//0x0f5c, //14
76 	0x0f72, // 14
77 };
78 #endif
79 
80 u16 rtl8225bcd_rxgain[]={
81 	0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
82 	0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
83 	0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
84 	0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
85 	0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
86 	0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
87 	0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
88 	0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
89 	0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
90 	0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
91 	0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
92 	0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
93 
94 };
95 
96 
97 #if 0
98 u16 rtl8225bc_rxgain[]={
99 	0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
100 	0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
101 	0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
102 	0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
103 	0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
104 	0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
105 	0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
106 	0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
107 	0x0794, 0x0795, 0x0798, 0x0799, 0x039a, 0x039b, 0x039c, 0x039d,
108 	0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
109 	0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
110 	0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
111 
112 };
113 
114 
115 u16 rtl8225a_rxgain[]={
116 	0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
117 	0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
118 	0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
119 	0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
120 	0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
121 	0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
122 	0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
123 	0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
124 	0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
125 	0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
126 	0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07ad, 0x07ad, 0x07ad, 0x07ad,
127 	0x07ad, 0x07ad, 0x07ad, 0x07ad, 0x07ad, 0x07ad, 0x07ad
128 };
129 #endif
130 
131 u8 rtl8225_agc[]={
132 	0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9e,0x9d,0x9c,0x9b,0x9a,0x99,0x98,0x97,0x96,
133 	0x95,0x94,0x93,0x92,0x91,0x90,0x8f,0x8e,0x8d,0x8c,0x8b,0x8a,0x89,0x88,0x87,0x86,
134 	0x85,0x84,0x83,0x82,0x81,0x80,0x3f,0x3e,0x3d,0x3c,0x3b,0x3a,0x39,0x38,0x37,0x36,
135 	0x35,0x34,0x33,0x32,0x31,0x30,0x2f,0x2e,0x2d,0x2c,0x2b,0x2a,0x29,0x28,0x27,0x26,
136 	0x25,0x24,0x23,0x22,0x21,0x20,0x1f,0x1e,0x1d,0x1c,0x1b,0x1a,0x19,0x18,0x17,0x16,
137 	0x15,0x14,0x13,0x12,0x11,0x10,0x0f,0x0e,0x0d,0x0c,0x0b,0x0a,0x09,0x08,0x07,0x06,
138 	0x05,0x04,0x03,0x02,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
139 	0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,
140 };
141 
142 
143 u8 rtl8225_tx_gain_cck_ofdm[]={
144 	0x02,0x06,0x0e,0x1e,0x3e,0x7e
145 };
146 
147 
148 u8 rtl8225_tx_power_ofdm[]={
149 	0x80,0x90,0xa2,0xb5,0xcb,0xe4
150 };
151 
152 
153 u8 rtl8225_tx_power_cck_ch14[]={
154 	0x18,0x17,0x15,0x0c,0x00,0x00,0x00,0x00,
155 	0x1b,0x1a,0x17,0x0e,0x00,0x00,0x00,0x00,
156 	0x1f,0x1e,0x1a,0x0f,0x00,0x00,0x00,0x00,
157 	0x22,0x21,0x1d,0x11,0x00,0x00,0x00,0x00,
158 	0x26,0x25,0x21,0x13,0x00,0x00,0x00,0x00,
159 	0x2b,0x2a,0x25,0x15,0x00,0x00,0x00,0x00
160 };
161 
162 
163 u8 rtl8225_tx_power_cck[]={
164 	0x18,0x17,0x15,0x11,0x0c,0x08,0x04,0x02,
165 	0x1b,0x1a,0x17,0x13,0x0e,0x09,0x04,0x02,
166 	0x1f,0x1e,0x1a,0x15,0x10,0x0a,0x05,0x02,
167 	0x22,0x21,0x1d,0x18,0x11,0x0b,0x06,0x02,
168 	0x26,0x25,0x21,0x1b,0x14,0x0d,0x06,0x03,
169 	0x2b,0x2a,0x25,0x1e,0x16,0x0e,0x07,0x03
170 };
171 
172 
rtl8225_set_gain(struct net_device * dev,short gain)173 void rtl8225_set_gain(struct net_device *dev, short gain)
174 {
175 	write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 4]);
176 	write_phy_ofdm(dev, 0x23, rtl8225_gain[gain * 4 + 1]);
177 	write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 4 + 2]);
178 	write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 4 + 3]);
179 }
180 #if 0
181 
182 void rtl8225_set_gain(struct net_device *dev, short gain)
183 {
184 	struct r8180_priv *priv = ieee80211_priv(dev);
185 
186 	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
187 
188 	if(priv->card_8185 == 2)
189 		write_phy_ofdm(dev, 0x21, 0x27);
190 	else
191 		write_phy_ofdm(dev, 0x21, 0x37);
192 
193 	write_phy_ofdm(dev, 0x25, 0x20);
194 	write_phy_ofdm(dev, 0x11, 0x6);
195 
196 	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
197 		write_phy_ofdm(dev, 0x27, 0x8);
198 	else
199 		write_phy_ofdm(dev, 0x27, 0x88);
200 
201 	write_phy_ofdm(dev, 0x14, 0);
202 	write_phy_ofdm(dev, 0x16, 0);
203 	write_phy_ofdm(dev, 0x15, 0x40);
204 	write_phy_ofdm(dev, 0x17, 0x40);
205 
206 	write_phy_ofdm(dev, 0x0d, rtl8225_gain[gain * 4]);
207 	write_phy_ofdm(dev, 0x23, rtl8225_gain[gain * 4 + 1]);
208 	write_phy_ofdm(dev, 0x1b, rtl8225_gain[gain * 4 + 2]);
209 	write_phy_ofdm(dev, 0x1d, rtl8225_gain[gain * 4 + 3]);
210 	//rtl8225_set_gain_usb(dev, gain);
211 }
212 #endif
213 
214 
write_rtl8225(struct net_device * dev,u8 adr,u16 data)215 void write_rtl8225(struct net_device *dev, u8 adr, u16 data)
216 {
217 	int i;
218 	u16 out,select;
219 	u8 bit;
220 	u32 bangdata = (data << 4) | (adr & 0xf);
221 	struct r8180_priv *priv = ieee80211_priv(dev);
222 
223 	out = read_nic_word(dev, RFPinsOutput) & 0xfff3;
224 
225 	write_nic_word(dev,RFPinsEnable,
226 		(read_nic_word(dev,RFPinsEnable) | 0x7));
227 
228 	select = read_nic_word(dev, RFPinsSelect);
229 
230 	write_nic_word(dev, RFPinsSelect, select | 0x7 |
231 		((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
232 
233 	force_pci_posting(dev);
234 	udelay(10);
235 
236 	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN );//| 0x1fff);
237 
238 	force_pci_posting(dev);
239 	udelay(2);
240 
241 	write_nic_word(dev, RFPinsOutput, out);
242 
243 	force_pci_posting(dev);
244 	udelay(10);
245 
246 
247 	for(i=15; i>=0;i--){
248 
249 		bit = (bangdata & (1<<i)) >> i;
250 
251 		write_nic_word(dev, RFPinsOutput, bit | out);
252 
253 		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
254 		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
255 
256 		i--;
257 		bit = (bangdata & (1<<i)) >> i;
258 
259 		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
260 		write_nic_word(dev, RFPinsOutput, bit | out | BB_HOST_BANG_CLK);
261 
262 		write_nic_word(dev, RFPinsOutput, bit | out);
263 
264 	}
265 
266 	write_nic_word(dev, RFPinsOutput, out | BB_HOST_BANG_EN);
267 
268 	force_pci_posting(dev);
269 	udelay(10);
270 
271 	write_nic_word(dev, RFPinsOutput, out |
272 		((priv->card_type == USB) ? 4 : BB_HOST_BANG_EN));
273 
274 	write_nic_word(dev, RFPinsSelect, select |
275 		((priv->card_type == USB) ? 0 : SW_CONTROL_GPIO));
276 
277 	if(priv->card_type == USB)
278 		mdelay(2);
279 	else
280 		rtl8185_rf_pins_enable(dev);
281 }
282 
rtl8225_rf_close(struct net_device * dev)283 void rtl8225_rf_close(struct net_device *dev)
284 {
285 	write_rtl8225(dev, 0x4, 0x1f);
286 
287 	force_pci_posting(dev);
288 	mdelay(1);
289 
290 	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_OFF);
291 	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_OFF);
292 }
293 
rtl8225_SetTXPowerLevel(struct net_device * dev,short ch)294 void rtl8225_SetTXPowerLevel(struct net_device *dev, short ch)
295 {
296 	struct r8180_priv *priv = ieee80211_priv(dev);
297 
298 	int GainIdx;
299 	int GainSetting;
300 	int i;
301 	u8 power;
302 	u8 *cck_power_table;
303 	u8 max_cck_power_level;
304 	u8 max_ofdm_power_level;
305 	u8 min_ofdm_power_level;
306 	u8 cck_power_level = 0xff & priv->chtxpwr[ch];
307 	u8 ofdm_power_level = 0xff & priv->chtxpwr_ofdm[ch];
308 
309 	if(priv->card_type == USB){
310 		max_cck_power_level = 11;
311 		max_ofdm_power_level = 25; //  12 -> 25
312 		min_ofdm_power_level = 10;
313 	}else{
314 		max_cck_power_level = 35;
315 		max_ofdm_power_level = 35;
316 		min_ofdm_power_level = 0;
317 	}
318 	/* CCK power setting */
319 	if(cck_power_level > max_cck_power_level)
320 		cck_power_level = max_cck_power_level;
321 	GainIdx=cck_power_level % 6;
322 	GainSetting=cck_power_level / 6;
323 
324 	if(ch == 14)
325 		cck_power_table = rtl8225_tx_power_cck_ch14;
326 	else
327 		cck_power_table = rtl8225_tx_power_cck;
328 
329 //	if(priv->card_8185 == 1 && priv->card_8185_Bversion ){
330 		/*Ver B*/
331 //		write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]);
332 //	}else{
333 		/*Ver C - D */
334 	write_nic_byte(dev, TX_GAIN_CCK, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
335 //	}
336 
337 	for(i=0;i<8;i++){
338 
339 		power = cck_power_table[GainIdx * 8 + i];
340 		write_phy_cck(dev, 0x44 + i, power);
341 	}
342 
343 	/* FIXME Is this delay really needeed ? */
344 	force_pci_posting(dev);
345 	mdelay(1);
346 
347 	/* OFDM power setting */
348 //  Old:
349 //	if(ofdm_power_level > max_ofdm_power_level)
350 //		ofdm_power_level = 35;
351 //	ofdm_power_level += min_ofdm_power_level;
352 //  Latest:
353 	if(ofdm_power_level > (max_ofdm_power_level - min_ofdm_power_level))
354 		ofdm_power_level = max_ofdm_power_level;
355 	else
356 		ofdm_power_level += min_ofdm_power_level;
357 	if(ofdm_power_level > 35)
358 		ofdm_power_level = 35;
359 //
360 
361 	GainIdx=ofdm_power_level % 6;
362 	GainSetting=ofdm_power_level / 6;
363 #if 1
364 //	if(priv->card_type == USB){
365 		rtl8185_set_anaparam2(dev,RTL8225_ANAPARAM2_ON);
366 
367 		write_phy_ofdm(dev,2,0x42);
368 		write_phy_ofdm(dev,6,0);
369 		write_phy_ofdm(dev,8,0);
370 //	}
371 #endif
372 //	if(priv->card_8185 == 1 && priv->card_8185_Bversion){
373 //		/*Ver B*/
374 //		write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]);
375 //	}else{
376 		/*Ver C - D */
377 	write_nic_byte(dev, TX_GAIN_OFDM, rtl8225_tx_gain_cck_ofdm[GainSetting]>>1);
378 //	}
379 
380 
381 	power = rtl8225_tx_power_ofdm[GainIdx];
382 
383 	write_phy_ofdm(dev, 0x5, power);
384 	write_phy_ofdm(dev, 0x7, power);
385 
386 	force_pci_posting(dev);
387 	mdelay(1);
388 	//write_nic_byte(dev, TX_AGC_CONTROL,4);
389 }
390 #if 0
391 /* switch between mode B and G */
392 void rtl8225_set_mode(struct net_device *dev, short modeb)
393 {
394 	write_phy_ofdm(dev, 0x15, (modeb ? 0x0 : 0x40));
395 	write_phy_ofdm(dev, 0x17, (modeb ? 0x0 : 0x40));
396 }
397 #endif
rtl8225_rf_set_chan(struct net_device * dev,short ch)398 void rtl8225_rf_set_chan(struct net_device *dev, short ch)
399 {
400 	struct r8180_priv *priv = ieee80211_priv(dev);
401 	short gset = (priv->ieee80211->state == IEEE80211_LINKED &&
402 		ieee80211_is_54g(priv->ieee80211->current_network)) ||
403 		priv->ieee80211->iw_mode == IW_MODE_MONITOR;
404 
405 	rtl8225_SetTXPowerLevel(dev, ch);
406 
407 	write_rtl8225(dev, 0x7, rtl8225_chan[ch]);
408 
409 	force_pci_posting(dev);
410 	mdelay(10);
411 
412 	// A mode sifs 0x44, difs 34-14, slot 9, eifs 23, cwm 3, cwM 7, ctstoself 0x10
413 	if(gset){
414 		write_nic_byte(dev,SIFS,0x22);// SIFS: 0x22
415 		write_nic_byte(dev,DIFS,0x14); //DIFS: 20
416 		//write_nic_byte(dev,DIFS,20); //DIFS: 20
417 	}else{
418 		write_nic_byte(dev,SIFS,0x44);// SIFS: 0x22
419 		write_nic_byte(dev,DIFS,50 - 14); //DIFS: 36
420 	}
421 	if(priv->ieee80211->state == IEEE80211_LINKED &&
422 		ieee80211_is_shortslot(priv->ieee80211->current_network))
423 		write_nic_byte(dev,SLOT,0x9); //SLOT: 9
424 
425 	else
426 		write_nic_byte(dev,SLOT,0x14); //SLOT: 20 (0x14)
427 
428 
429 	if(gset){
430 		write_nic_byte(dev,EIFS,81);//91 - 20); // EIFS: 91 (0x5B)
431 		write_nic_byte(dev,CW_VAL,0x73); //CW VALUE: 0x37
432 		//DMESG("using G net params");
433 	}else{
434 		write_nic_byte(dev,EIFS,81); // EIFS: 91 (0x5B)
435 		write_nic_byte(dev,CW_VAL,0xa5); //CW VALUE: 0x37
436 		//DMESG("using B net params");
437 	}
438 
439 
440 }
441 
rtl8225_host_pci_init(struct net_device * dev)442 void rtl8225_host_pci_init(struct net_device *dev)
443 {
444 	write_nic_word(dev, RFPinsOutput, 0x480);
445 
446 	rtl8185_rf_pins_enable(dev);
447 
448 	//if(priv->card_8185 == 2 && priv->enable_gpio0 ) /* version D */
449 	//write_nic_word(dev, RFPinsSelect, 0x88);
450 	//else
451 	write_nic_word(dev, RFPinsSelect, 0x88 | SW_CONTROL_GPIO); /* 0x488 | SW_CONTROL_GPIO */
452 
453 	write_nic_byte(dev, GP_ENABLE, 0);
454 
455 	force_pci_posting(dev);
456 	mdelay(200);
457 
458 	write_nic_word(dev, GP_ENABLE, 0xff & (~(1<<6))); /* bit 6 is for RF on/off detection */
459 
460 
461 }
462 
rtl8225_host_usb_init(struct net_device * dev)463 void rtl8225_host_usb_init(struct net_device *dev)
464 {
465 	#if 0
466 	write_nic_byte(dev,RFPinsSelect+1,0);
467 
468 	write_nic_byte(dev,GPIO,0);
469 
470 	write_nic_byte_E(dev,0x53,read_nic_byte_E(dev,0x53) | (1<<7));
471 
472 	write_nic_byte(dev,RFPinsSelect+1,4);
473 
474 	write_nic_byte(dev,GPIO,0x20);
475 
476 	write_nic_byte(dev,GP_ENABLE,0);
477 
478 
479 	/* Config BB & RF */
480 	write_nic_word(dev, RFPinsOutput, 0x80);
481 
482 	write_nic_word(dev, RFPinsSelect, 0x80);
483 
484 	write_nic_word(dev, RFPinsEnable, 0x80);
485 
486 
487 	mdelay(100);
488 
489 	mdelay(1000);
490 #endif
491 
492 }
493 
rtl8225_rf_sleep(struct net_device * dev)494 void rtl8225_rf_sleep(struct net_device *dev)
495 {
496 	write_rtl8225(dev,0x4,0xdff);
497 	force_pci_posting(dev);
498 	mdelay(1);
499 	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_SLEEP);
500 	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_SLEEP);
501 	force_pci_posting(dev);
502 }
503 
rtl8225_rf_wakeup(struct net_device * dev)504 void rtl8225_rf_wakeup(struct net_device *dev)
505 {
506 	write_rtl8225(dev,0x4,0x9ff);
507 	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
508 	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
509 	force_pci_posting(dev);
510 }
511 
rtl8225_rf_init(struct net_device * dev)512 void rtl8225_rf_init(struct net_device *dev)
513 {
514 	struct r8180_priv *priv = ieee80211_priv(dev);
515 	int i;
516 	short channel = 1;
517 	u16 brsr;
518 
519 	priv->chan = channel;
520 
521 	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
522 
523 
524 	if(priv->card_type == USB)
525 		rtl8225_host_usb_init(dev);
526 	else
527 		rtl8225_host_pci_init(dev);
528 
529 	write_nic_dword(dev, RF_TIMING, 0x000a8008);
530 
531 	brsr = read_nic_word(dev, BRSR);
532 
533 	write_nic_word(dev, BRSR, 0xffff);
534 
535 	#if 0
536 	if(priv->card_8185 == 1){/* version C or B */
537 		if(priv->card_8185_Bversion)  /* version B*/
538 			write_nic_dword(dev, RF_PARA, 0x44);
539 		else    /* version C */
540 			write_nic_dword(dev, RF_PARA, 0x100044);
541 	}else{ /* version D */
542 		if(priv->enable_gpio0)
543 			write_nic_dword(dev, RF_PARA, 0x20100044);
544 		else /* also USB */
545 			write_nic_dword(dev, RF_PARA, 0x100044);
546 	}
547 	#endif
548 
549 	write_nic_dword(dev, RF_PARA, 0x100044);
550 
551 	#if 1  //0->1
552 	rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
553 	write_nic_byte(dev, CONFIG3, 0x44);
554 	rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
555 	#endif
556 
557 	if(priv->card_type == USB){
558 		rtl8185_rf_pins_enable(dev);
559 
560 		mdelay(1000);
561 	}
562 
563 	write_rtl8225(dev, 0x0, 0x67); mdelay(1);
564 
565 
566 	write_rtl8225(dev, 0x1, 0xfe0); mdelay(1);
567 
568 	write_rtl8225(dev, 0x2, 0x44d); mdelay(1);
569 
570 	write_rtl8225(dev, 0x3, 0x441); mdelay(1);
571 
572 	if(priv->card_type == USB)
573 		write_rtl8225(dev, 0x4, 0x486);
574 	else
575 		write_rtl8225(dev, 0x4, 0x8be);
576 
577 	mdelay(1);
578 
579 
580 	#if 0
581 	}else if(priv->phy_ver == 1){
582 		/* version A */
583 		write_rtl8225(dev, 0x5, 0xbc0 + 2);
584 	}else{
585 	#endif
586 	/* version B & C */
587 
588 	if(priv->card_type == USB)
589 		write_rtl8225(dev, 0x5, 0xbc0);
590 	else if(priv->card_type == MINIPCI)
591 		write_rtl8225(dev, 0x5, 0xbc0 + 3 +(6<<3));
592 	else
593 		write_rtl8225(dev, 0x5, 0xbc0 + (6<<3));
594 
595 	 mdelay(1);
596 //	}
597 
598 	write_rtl8225(dev, 0x6, 0xae6);  mdelay(1);
599 
600 	write_rtl8225(dev, 0x7, ((priv->card_type == USB)? 0x82a : rtl8225_chan[channel]));  mdelay(1);
601 
602 	write_rtl8225(dev, 0x8, 0x1f);  mdelay(1);
603 
604 	write_rtl8225(dev, 0x9, 0x334);  mdelay(1);
605 
606 	write_rtl8225(dev, 0xa, 0xfd4);  mdelay(1);
607 
608 	write_rtl8225(dev, 0xb, 0x391);  mdelay(1);
609 
610 	write_rtl8225(dev, 0xc, 0x50);  mdelay(1);
611 
612 
613 	write_rtl8225(dev, 0xd, 0x6db);   mdelay(1);
614 
615 	write_rtl8225(dev, 0xe, 0x29);  mdelay(1);
616 
617 	write_rtl8225(dev, 0xf, 0x914);
618 
619 	if(priv->card_type == USB){
620 		//force_pci_posting(dev);
621 		mdelay(100);
622 	}
623 
624 	write_rtl8225(dev, 0x2, 0xc4d);
625 
626 	if(priv->card_type == USB){
627 	//	force_pci_posting(dev);
628 		mdelay(200);
629 
630 		write_rtl8225(dev, 0x2, 0x44d);
631 
632 	//	force_pci_posting(dev);
633 		mdelay(100);
634 
635 	}//End of if(priv->card_type == USB)
636 	/* FIXME!! rtl8187 we have to check if calibrarion
637 	 * is successful and eventually cal. again (repeat
638 	 * the two write on reg 2)
639 	*/
640 	force_pci_posting(dev);
641 
642 	mdelay(100); //200 for 8187
643 
644 	//if(priv->card_type != USB) /* maybe not needed even for 8185 */
645 //	write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
646 
647 	write_rtl8225(dev, 0x0, 0x127);
648 
649 	for(i=0;i<95;i++){
650 		write_rtl8225(dev, 0x1, (u8)(i+1));
651 
652 		#if 0
653 		if(priv->phy_ver == 1)
654 			/* version A */
655 			write_rtl8225(dev, 0x2, rtl8225a_rxgain[i]);
656 		else
657 		#endif
658 		/* version B & C & D*/
659 
660 		write_rtl8225(dev, 0x2, rtl8225bcd_rxgain[i]);
661 	}
662 
663 	write_rtl8225(dev, 0x0, 0x27);
664 
665 
666 //	//if(priv->card_type != USB){
667 //		write_rtl8225(dev, 0x2, 0x44d);
668 //		write_rtl8225(dev, 0x7, rtl8225_chan[channel]);
669 //		write_rtl8225(dev, 0x2, 0x47d);
670 //
671 //		force_pci_posting(dev);
672 //		mdelay(100);
673 //
674 //		write_rtl8225(dev, 0x2, 0x44d);
675 //	//}
676 
677 	write_rtl8225(dev, 0x0, 0x22f);
678 
679 	if(priv->card_type != USB)
680 		rtl8185_rf_pins_enable(dev);
681 
682 	for(i=0;i<128;i++){
683 		write_phy_ofdm(dev, 0xb, rtl8225_agc[i]);
684 
685 		mdelay(1);
686 		write_phy_ofdm(dev, 0xa, (u8)i+ 0x80);
687 
688 		mdelay(1);
689 	}
690 
691 	force_pci_posting(dev);
692 	mdelay(1);
693 
694 	write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
695 	write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
696 	write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
697 	write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
698 	write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
699 	write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
700 	write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
701 	write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
702 	write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
703 	write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
704 
705 	#if 0
706 	if(priv->card_type == USB){
707 		write_phy_ofdm(dev, 0xa, 0x9);
708 	}else{
709 		if(priv->card_8185 == 1 && priv->card_8185_Bversion){
710 			/* Ver B
711 			* maybe later version can accept this also?
712 			*/
713 			write_phy_ofdm(dev, 0xa, 0x6);
714 			write_phy_ofdm(dev, 0x18, 0x6f);
715 		}else{
716 	#endif
717 			/* ver C & D */
718 	write_phy_ofdm(dev, 0xa, 0x9); mdelay(1);
719 
720 	//write_phy_ofdm(dev, 0x18, 0xef);
721 	//	}
722 	//}
723 	write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
724 
725 	write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
726 
727 
728 	//if(priv->card_type != USB)
729 	//write_phy_ofdm(dev, 0xd, 0x33); // <>
730 
731 	write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
732 
733 
734 	#if 0
735 	if(priv->card_8185 == 1){
736 		if(priv->card_8185_Bversion)
737 			write_phy_ofdm(dev, 0xf, 0x20);/*ver B*/
738 		else
739 			write_phy_ofdm(dev, 0xf, 0x28);/*ver C*/
740 	}else{
741 	#endif
742 	write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
743 /*ver D & 8187*/
744 //	}
745 
746 //	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
747 //		write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
748 //	else
749 	write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
750 /*ver C & D & 8187*/
751 
752 	write_phy_ofdm(dev, 0x11, 0x06);mdelay(1);
753 /*agc resp time 700*/
754 
755 
756 //	if(priv->card_8185 == 2){
757 	/* Ver D & 8187*/
758 	write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
759 
760 	write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
761 
762 #if 0
763 	}else{
764 		/* Ver B & C*/
765 		write_phy_ofdm(dev, 0x12, 0x0);
766 		write_phy_ofdm(dev, 0x13, 0x0);
767 	}
768 #endif
769 	write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
770 	write_phy_ofdm(dev, 0x15, 0x40); mdelay(1);
771 	write_phy_ofdm(dev, 0x16, 0x0); mdelay(1);
772 	write_phy_ofdm(dev, 0x17, 0x40); mdelay(1);
773 
774 //	if (priv->card_type == USB)
775 //		write_phy_ofdm(dev, 0x18, 0xef);
776 
777 	write_phy_ofdm(dev, 0x18, 0xef);mdelay(1);
778 
779 
780 	write_phy_ofdm(dev, 0x19, 0x19); mdelay(1);
781 	write_phy_ofdm(dev, 0x1a, 0x20); mdelay(1);
782 
783 //	if (priv->card_type != USB){
784 //		if(priv->card_8185 == 1 && priv->card_8185_Bversion)
785 //			write_phy_ofdm(dev, 0x1b, 0x66); /* Ver B */
786 //		else
787 	write_phy_ofdm(dev, 0x1b, 0x76);mdelay(1);
788  /* Ver C & D */ //FIXME:MAYBE not needed
789 //	}
790 
791 	write_phy_ofdm(dev, 0x1c, 0x4);mdelay(1);
792 
793 #if 0
794 	if(priv->card_8185 == 1){
795 		if(priv->card_8185_Bversion){
796 			/*ver B*/
797 			write_phy_ofdm(dev, 0x1e, 0x95);
798 			write_phy_ofdm(dev, 0x1f, 0x55);
799 		}else{
800 			/*ver C*/
801 			write_phy_ofdm(dev, 0x1e, 0x90);
802 			write_phy_ofdm(dev, 0x1f, 0x34);
803 
804 		}
805 	}else{
806 #endif
807 		/*ver D & 8187*/
808 	write_phy_ofdm(dev, 0x1e, 0x95);mdelay(1);
809 
810 	write_phy_ofdm(dev, 0x1f, 0x75);	mdelay(1);
811 
812 //	}
813 
814 	write_phy_ofdm(dev, 0x20, 0x1f);mdelay(1);
815 
816 	write_phy_ofdm(dev, 0x21, 0x27);mdelay(1);
817 
818 	write_phy_ofdm(dev, 0x22, 0x16);mdelay(1);
819 
820 //	if(priv->card_type != USB)
821 	//write_phy_ofdm(dev, 0x23, 0x43); //FIXME maybe not needed // <>
822 
823 	write_phy_ofdm(dev, 0x24, 0x46); mdelay(1);
824 	write_phy_ofdm(dev, 0x25, 0x20); mdelay(1);
825 	write_phy_ofdm(dev, 0x26, 0x90); mdelay(1);
826 #if 0
827 	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
828 		write_phy_ofdm(dev, 0x27, 0x08); /* Ver B. might work also fo ver C&D ?*/
829 	else
830 #endif
831 	write_phy_ofdm(dev, 0x27, 0x88); mdelay(1);
832 /* Ver C & D & 8187*/
833 
834 	// <> Set init. gain to m74dBm.
835 	write_phy_ofdm(dev, 0x0d, 0x43);	 mdelay(1);
836 	write_phy_ofdm(dev, 0x1b, 0x76);	 mdelay(1);
837 	write_phy_ofdm(dev, 0x1d, 0xc5);	 mdelay(1);
838 	write_phy_ofdm(dev, 0x23, 0x78);	 mdelay(1);
839 
840 	//if(priv->card_type == USB);
841 	//	rtl8225_set_gain_usb(dev, 1); /* FIXME this '2' is random */
842 
843 	write_phy_cck(dev, 0x0, 0x98); mdelay(1);
844 	write_phy_cck(dev, 0x3, 0x20); mdelay(1);
845 	write_phy_cck(dev, 0x4, 0x7e); mdelay(1);
846 	write_phy_cck(dev, 0x5, 0x12); mdelay(1);
847 	write_phy_cck(dev, 0x6, 0xfc); mdelay(1);
848 #if 0
849 	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
850 		write_phy_cck(dev, 0x7, 0xd8); /* Ver B */
851 	else
852 #endif
853 	write_phy_cck(dev, 0x7, 0x78);mdelay(1);
854  /* Ver C & D & 8187*/
855 
856 	write_phy_cck(dev, 0x8, 0x2e);mdelay(1);
857 
858 	write_phy_cck(dev, 0x10, ((priv->card_type == USB) ? 0x9b: 0x93)); mdelay(1);
859 	write_phy_cck(dev, 0x11, 0x88); mdelay(1);
860 	write_phy_cck(dev, 0x12, 0x47); mdelay(1);
861 #if 0
862 	if(priv->card_8185 == 1 && priv->card_8185_Bversion)
863 		write_phy_cck(dev, 0x13, 0x98); /* Ver B */
864 	else
865 #endif
866 	write_phy_cck(dev, 0x13, 0xd0); /* Ver C & D & 8187*/
867 
868 	write_phy_cck(dev, 0x19, 0x0);
869 	write_phy_cck(dev, 0x1a, 0xa0);
870 	write_phy_cck(dev, 0x1b, 0x8);
871 	write_phy_cck(dev, 0x40, 0x86); /* CCK Carrier Sense Threshold */
872 
873 	write_phy_cck(dev, 0x41, 0x8d);mdelay(1);
874 
875 
876 	write_phy_cck(dev, 0x42, 0x15); mdelay(1);
877 	write_phy_cck(dev, 0x43, 0x18); mdelay(1);
878 	write_phy_cck(dev, 0x44, 0x1f); mdelay(1);
879 	write_phy_cck(dev, 0x45, 0x1e); mdelay(1);
880 	write_phy_cck(dev, 0x46, 0x1a); mdelay(1);
881 	write_phy_cck(dev, 0x47, 0x15); mdelay(1);
882 	write_phy_cck(dev, 0x48, 0x10); mdelay(1);
883 	write_phy_cck(dev, 0x49, 0xa); mdelay(1);
884 	write_phy_cck(dev, 0x4a, 0x5); mdelay(1);
885 	write_phy_cck(dev, 0x4b, 0x2); mdelay(1);
886 	write_phy_cck(dev, 0x4c, 0x5);mdelay(1);
887 
888 
889 	write_nic_byte(dev, 0x5b, 0x0d); mdelay(1);
890 
891 
892 
893 // <>
894 //	// TESTR 0xb 8187
895 //	write_phy_cck(dev, 0x10, 0x93);// & 0xfb);
896 //
897 //	//if(priv->card_type != USB){
898 //		write_phy_ofdm(dev, 0x2, 0x62);
899 //		write_phy_ofdm(dev, 0x6, 0x0);
900 //		write_phy_ofdm(dev, 0x8, 0x0);
901 //	//}
902 
903 	rtl8225_SetTXPowerLevel(dev, channel);
904 
905 	write_phy_cck(dev, 0x10, 0x9b); mdelay(1); /* Rx ant A, 0xdb for B */
906 	write_phy_ofdm(dev, 0x26, 0x90); mdelay(1); /* Rx ant A, 0x10 for B */
907 
908 	rtl8185_tx_antenna(dev, 0x3); /* TX ant A, 0x0 for B */
909 
910 	/* switch to high-speed 3-wire
911 	 * last digit. 2 for both cck and ofdm
912 	 */
913 	if(priv->card_type == USB)
914 		write_nic_dword(dev, 0x94, 0x3dc00002);
915 	else{
916 		write_nic_dword(dev, 0x94, 0x15c00002);
917 		rtl8185_rf_pins_enable(dev);
918 	}
919 
920 //	if(priv->card_type != USB)
921 //	rtl8225_set_gain(dev, 4); /* FIXME this '1' is random */ // <>
922 //	 rtl8225_set_mode(dev, 1); /* FIXME start in B mode */ // <>
923 //
924 //	/* make sure is waken up! */
925 //	write_rtl8225(dev,0x4, 0x9ff);
926 //	rtl8180_set_anaparam(dev, RTL8225_ANAPARAM_ON);
927 //	rtl8185_set_anaparam2(dev, RTL8225_ANAPARAM2_ON);
928 
929 	rtl8225_rf_set_chan(dev, priv->chan);
930 
931 	write_nic_word(dev,BRSR,brsr);
932 
933 }
934