1 /* linux/arch/arm/plat-s3c64xx/cpu.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX CPU Support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22
23 #include <mach/hardware.h>
24 #include <mach/map.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28
29 #include <plat/regs-serial.h>
30
31 #include <plat/cpu.h>
32 #include <plat/devs.h>
33 #include <plat/clock.h>
34
35 #include <plat/s3c6400.h>
36 #include <plat/s3c6410.h>
37
38 /* table of supported CPUs */
39
40 static const char name_s3c6400[] = "S3C6400";
41 static const char name_s3c6410[] = "S3C6410";
42
43 static struct cpu_table cpu_ids[] __initdata = {
44 {
45 .idcode = 0x36400000,
46 .idmask = 0xfffff000,
47 .map_io = s3c6400_map_io,
48 .init_clocks = s3c6400_init_clocks,
49 .init_uarts = s3c6400_init_uarts,
50 .init = s3c6400_init,
51 .name = name_s3c6400,
52 }, {
53 .idcode = 0x36410100,
54 .idmask = 0xffffff00,
55 .map_io = s3c6410_map_io,
56 .init_clocks = s3c6410_init_clocks,
57 .init_uarts = s3c6410_init_uarts,
58 .init = s3c6410_init,
59 .name = name_s3c6410,
60 },
61 };
62
63 /* minimal IO mapping */
64
65 /* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
66 #define UART_OFFS (S3C_PA_UART & 0xfffff)
67
68 static struct map_desc s3c_iodesc[] __initdata = {
69 {
70 .virtual = (unsigned long)S3C_VA_SYS,
71 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
72 .length = SZ_4K,
73 .type = MT_DEVICE,
74 }, {
75 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
76 .pfn = __phys_to_pfn(S3C_PA_UART),
77 .length = SZ_4K,
78 .type = MT_DEVICE,
79 }, {
80 .virtual = (unsigned long)S3C_VA_VIC0,
81 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
82 .length = SZ_16K,
83 .type = MT_DEVICE,
84 }, {
85 .virtual = (unsigned long)S3C_VA_VIC1,
86 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
87 .length = SZ_16K,
88 .type = MT_DEVICE,
89 }, {
90 .virtual = (unsigned long)S3C_VA_TIMER,
91 .pfn = __phys_to_pfn(S3C_PA_TIMER),
92 .length = SZ_16K,
93 .type = MT_DEVICE,
94 }, {
95 .virtual = (unsigned long)S3C64XX_VA_GPIO,
96 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
97 .length = SZ_4K,
98 .type = MT_DEVICE,
99 },
100 };
101
102 /* read cpu identification code */
103
s3c64xx_init_io(struct map_desc * mach_desc,int size)104 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
105 {
106 unsigned long idcode;
107
108 /* initialise the io descriptors we need for initialisation */
109 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
110 iotable_init(mach_desc, size);
111
112 idcode = __raw_readl(S3C_VA_SYS + 0x118);
113 s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
114 }
115