1 /* linux/arch/arm/plat-s3c24xx/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/irq.h>
27 #include <mach/fb.h>
28 #include <mach/hardware.h>
29 #include <asm/irq.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/udc.h>
33
34 #include <plat/devs.h>
35 #include <plat/cpu.h>
36 #include <plat/regs-spi.h>
37
38 /* Serial port registrations */
39
40 static struct resource s3c2410_uart0_resource[] = {
41 [0] = {
42 .start = S3C2410_PA_UART0,
43 .end = S3C2410_PA_UART0 + 0x3fff,
44 .flags = IORESOURCE_MEM,
45 },
46 [1] = {
47 .start = IRQ_S3CUART_RX0,
48 .end = IRQ_S3CUART_ERR0,
49 .flags = IORESOURCE_IRQ,
50 }
51 };
52
53 static struct resource s3c2410_uart1_resource[] = {
54 [0] = {
55 .start = S3C2410_PA_UART1,
56 .end = S3C2410_PA_UART1 + 0x3fff,
57 .flags = IORESOURCE_MEM,
58 },
59 [1] = {
60 .start = IRQ_S3CUART_RX1,
61 .end = IRQ_S3CUART_ERR1,
62 .flags = IORESOURCE_IRQ,
63 }
64 };
65
66 static struct resource s3c2410_uart2_resource[] = {
67 [0] = {
68 .start = S3C2410_PA_UART2,
69 .end = S3C2410_PA_UART2 + 0x3fff,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = IRQ_S3CUART_RX2,
74 .end = IRQ_S3CUART_ERR2,
75 .flags = IORESOURCE_IRQ,
76 }
77 };
78
79 static struct resource s3c2410_uart3_resource[] = {
80 [0] = {
81 .start = S3C2443_PA_UART3,
82 .end = S3C2443_PA_UART3 + 0x3fff,
83 .flags = IORESOURCE_MEM,
84 },
85 [1] = {
86 .start = IRQ_S3CUART_RX3,
87 .end = IRQ_S3CUART_ERR3,
88 .flags = IORESOURCE_IRQ,
89 },
90 };
91
92 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
93 [0] = {
94 .resources = s3c2410_uart0_resource,
95 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
96 },
97 [1] = {
98 .resources = s3c2410_uart1_resource,
99 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
100 },
101 [2] = {
102 .resources = s3c2410_uart2_resource,
103 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
104 },
105 [3] = {
106 .resources = s3c2410_uart3_resource,
107 .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
108 },
109 };
110
111 /* yart devices */
112
113 static struct platform_device s3c24xx_uart_device0 = {
114 .id = 0,
115 };
116
117 static struct platform_device s3c24xx_uart_device1 = {
118 .id = 1,
119 };
120
121 static struct platform_device s3c24xx_uart_device2 = {
122 .id = 2,
123 };
124
125 static struct platform_device s3c24xx_uart_device3 = {
126 .id = 3,
127 };
128
129 struct platform_device *s3c24xx_uart_src[4] = {
130 &s3c24xx_uart_device0,
131 &s3c24xx_uart_device1,
132 &s3c24xx_uart_device2,
133 &s3c24xx_uart_device3,
134 };
135
136 struct platform_device *s3c24xx_uart_devs[4] = {
137 };
138
139 /* USB Host Controller */
140
141 static struct resource s3c_usb_resource[] = {
142 [0] = {
143 .start = S3C24XX_PA_USBHOST,
144 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = IRQ_USBH,
149 .end = IRQ_USBH,
150 .flags = IORESOURCE_IRQ,
151 }
152 };
153
154 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
155
156 struct platform_device s3c_device_usb = {
157 .name = "s3c2410-ohci",
158 .id = -1,
159 .num_resources = ARRAY_SIZE(s3c_usb_resource),
160 .resource = s3c_usb_resource,
161 .dev = {
162 .dma_mask = &s3c_device_usb_dmamask,
163 .coherent_dma_mask = 0xffffffffUL
164 }
165 };
166
167 EXPORT_SYMBOL(s3c_device_usb);
168
169 /* LCD Controller */
170
171 static struct resource s3c_lcd_resource[] = {
172 [0] = {
173 .start = S3C24XX_PA_LCD,
174 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
175 .flags = IORESOURCE_MEM,
176 },
177 [1] = {
178 .start = IRQ_LCD,
179 .end = IRQ_LCD,
180 .flags = IORESOURCE_IRQ,
181 }
182
183 };
184
185 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
186
187 struct platform_device s3c_device_lcd = {
188 .name = "s3c2410-lcd",
189 .id = -1,
190 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
191 .resource = s3c_lcd_resource,
192 .dev = {
193 .dma_mask = &s3c_device_lcd_dmamask,
194 .coherent_dma_mask = 0xffffffffUL
195 }
196 };
197
198 EXPORT_SYMBOL(s3c_device_lcd);
199
s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info * pd)200 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
201 {
202 struct s3c2410fb_mach_info *npd;
203
204 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
205 if (npd) {
206 memcpy(npd, pd, sizeof(*npd));
207 s3c_device_lcd.dev.platform_data = npd;
208 } else {
209 printk(KERN_ERR "no memory for LCD platform data\n");
210 }
211 }
212
213 /* NAND Controller */
214
215 static struct resource s3c_nand_resource[] = {
216 [0] = {
217 .start = S3C24XX_PA_NAND,
218 .end = S3C24XX_PA_NAND + S3C24XX_SZ_NAND - 1,
219 .flags = IORESOURCE_MEM,
220 }
221 };
222
223 struct platform_device s3c_device_nand = {
224 .name = "s3c2410-nand",
225 .id = -1,
226 .num_resources = ARRAY_SIZE(s3c_nand_resource),
227 .resource = s3c_nand_resource,
228 };
229
230 EXPORT_SYMBOL(s3c_device_nand);
231
232 /* USB Device (Gadget)*/
233
234 static struct resource s3c_usbgadget_resource[] = {
235 [0] = {
236 .start = S3C24XX_PA_USBDEV,
237 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
238 .flags = IORESOURCE_MEM,
239 },
240 [1] = {
241 .start = IRQ_USBD,
242 .end = IRQ_USBD,
243 .flags = IORESOURCE_IRQ,
244 }
245
246 };
247
248 struct platform_device s3c_device_usbgadget = {
249 .name = "s3c2410-usbgadget",
250 .id = -1,
251 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
252 .resource = s3c_usbgadget_resource,
253 };
254
255 EXPORT_SYMBOL(s3c_device_usbgadget);
256
s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info * pd)257 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
258 {
259 struct s3c2410_udc_mach_info *npd;
260
261 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
262 if (npd) {
263 memcpy(npd, pd, sizeof(*npd));
264 s3c_device_usbgadget.dev.platform_data = npd;
265 } else {
266 printk(KERN_ERR "no memory for udc platform data\n");
267 }
268 }
269
270
271 /* Watchdog */
272
273 static struct resource s3c_wdt_resource[] = {
274 [0] = {
275 .start = S3C24XX_PA_WATCHDOG,
276 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
277 .flags = IORESOURCE_MEM,
278 },
279 [1] = {
280 .start = IRQ_WDT,
281 .end = IRQ_WDT,
282 .flags = IORESOURCE_IRQ,
283 }
284
285 };
286
287 struct platform_device s3c_device_wdt = {
288 .name = "s3c2410-wdt",
289 .id = -1,
290 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
291 .resource = s3c_wdt_resource,
292 };
293
294 EXPORT_SYMBOL(s3c_device_wdt);
295
296 /* IIS */
297
298 static struct resource s3c_iis_resource[] = {
299 [0] = {
300 .start = S3C24XX_PA_IIS,
301 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
302 .flags = IORESOURCE_MEM,
303 }
304 };
305
306 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
307
308 struct platform_device s3c_device_iis = {
309 .name = "s3c2410-iis",
310 .id = -1,
311 .num_resources = ARRAY_SIZE(s3c_iis_resource),
312 .resource = s3c_iis_resource,
313 .dev = {
314 .dma_mask = &s3c_device_iis_dmamask,
315 .coherent_dma_mask = 0xffffffffUL
316 }
317 };
318
319 EXPORT_SYMBOL(s3c_device_iis);
320
321 /* RTC */
322
323 static struct resource s3c_rtc_resource[] = {
324 [0] = {
325 .start = S3C24XX_PA_RTC,
326 .end = S3C24XX_PA_RTC + 0xff,
327 .flags = IORESOURCE_MEM,
328 },
329 [1] = {
330 .start = IRQ_RTC,
331 .end = IRQ_RTC,
332 .flags = IORESOURCE_IRQ,
333 },
334 [2] = {
335 .start = IRQ_TICK,
336 .end = IRQ_TICK,
337 .flags = IORESOURCE_IRQ
338 }
339 };
340
341 struct platform_device s3c_device_rtc = {
342 .name = "s3c2410-rtc",
343 .id = -1,
344 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
345 .resource = s3c_rtc_resource,
346 };
347
348 EXPORT_SYMBOL(s3c_device_rtc);
349
350 /* ADC */
351
352 static struct resource s3c_adc_resource[] = {
353 [0] = {
354 .start = S3C24XX_PA_ADC,
355 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
356 .flags = IORESOURCE_MEM,
357 },
358 [1] = {
359 .start = IRQ_TC,
360 .end = IRQ_TC,
361 .flags = IORESOURCE_IRQ,
362 },
363 [2] = {
364 .start = IRQ_ADC,
365 .end = IRQ_ADC,
366 .flags = IORESOURCE_IRQ,
367 }
368
369 };
370
371 struct platform_device s3c_device_adc = {
372 .name = "s3c24xx-adc",
373 .id = -1,
374 .num_resources = ARRAY_SIZE(s3c_adc_resource),
375 .resource = s3c_adc_resource,
376 };
377
378 /* HWMON */
379
380 struct platform_device s3c_device_hwmon = {
381 .name = "s3c24xx-hwmon",
382 .id = -1,
383 .dev.parent = &s3c_device_adc.dev,
384 };
385
386 /* SDI */
387
388 static struct resource s3c_sdi_resource[] = {
389 [0] = {
390 .start = S3C24XX_PA_SDI,
391 .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
392 .flags = IORESOURCE_MEM,
393 },
394 [1] = {
395 .start = IRQ_SDI,
396 .end = IRQ_SDI,
397 .flags = IORESOURCE_IRQ,
398 }
399
400 };
401
402 struct platform_device s3c_device_sdi = {
403 .name = "s3c2410-sdi",
404 .id = -1,
405 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
406 .resource = s3c_sdi_resource,
407 };
408
409 EXPORT_SYMBOL(s3c_device_sdi);
410
411 /* SPI (0) */
412
413 static struct resource s3c_spi0_resource[] = {
414 [0] = {
415 .start = S3C24XX_PA_SPI,
416 .end = S3C24XX_PA_SPI + 0x1f,
417 .flags = IORESOURCE_MEM,
418 },
419 [1] = {
420 .start = IRQ_SPI0,
421 .end = IRQ_SPI0,
422 .flags = IORESOURCE_IRQ,
423 }
424
425 };
426
427 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
428
429 struct platform_device s3c_device_spi0 = {
430 .name = "s3c2410-spi",
431 .id = 0,
432 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
433 .resource = s3c_spi0_resource,
434 .dev = {
435 .dma_mask = &s3c_device_spi0_dmamask,
436 .coherent_dma_mask = 0xffffffffUL
437 }
438 };
439
440 EXPORT_SYMBOL(s3c_device_spi0);
441
442 /* SPI (1) */
443
444 static struct resource s3c_spi1_resource[] = {
445 [0] = {
446 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
447 .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
448 .flags = IORESOURCE_MEM,
449 },
450 [1] = {
451 .start = IRQ_SPI1,
452 .end = IRQ_SPI1,
453 .flags = IORESOURCE_IRQ,
454 }
455
456 };
457
458 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
459
460 struct platform_device s3c_device_spi1 = {
461 .name = "s3c2410-spi",
462 .id = 1,
463 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
464 .resource = s3c_spi1_resource,
465 .dev = {
466 .dma_mask = &s3c_device_spi1_dmamask,
467 .coherent_dma_mask = 0xffffffffUL
468 }
469 };
470
471 EXPORT_SYMBOL(s3c_device_spi1);
472
473 #ifdef CONFIG_CPU_S3C2440
474
475 /* Camif Controller */
476
477 static struct resource s3c_camif_resource[] = {
478 [0] = {
479 .start = S3C2440_PA_CAMIF,
480 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
481 .flags = IORESOURCE_MEM,
482 },
483 [1] = {
484 .start = IRQ_CAM,
485 .end = IRQ_CAM,
486 .flags = IORESOURCE_IRQ,
487 }
488
489 };
490
491 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
492
493 struct platform_device s3c_device_camif = {
494 .name = "s3c2440-camif",
495 .id = -1,
496 .num_resources = ARRAY_SIZE(s3c_camif_resource),
497 .resource = s3c_camif_resource,
498 .dev = {
499 .dma_mask = &s3c_device_camif_dmamask,
500 .coherent_dma_mask = 0xffffffffUL
501 }
502 };
503
504 EXPORT_SYMBOL(s3c_device_camif);
505
506 #endif // CONFIG_CPU_S32440
507