1 /*
2 * linux/arch/mips/pci/pci-tx4939.c
3 *
4 * Based on linux/arch/mips/txx9/rbtx4939/setup.c,
5 * and RBTX49xx patch from CELF patch archive.
6 *
7 * Copyright 2001, 2003-2005 MontaVista Software Inc.
8 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
9 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/kernel.h>
18 #include <linux/interrupt.h>
19 #include <asm/txx9/generic.h>
20 #include <asm/txx9/tx4939.h>
21
tx4939_report_pciclk(void)22 int __init tx4939_report_pciclk(void)
23 {
24 int pciclk = 0;
25
26 pr_info("PCIC --%s PCICLK:",
27 (__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66) ?
28 " PCI66" : "");
29 if (__raw_readq(&tx4939_ccfgptr->pcfg) & TX4939_PCFG_PCICLKEN_ALL) {
30 pciclk = txx9_master_clock * 20 / 6;
31 if (!(__raw_readq(&tx4939_ccfgptr->ccfg) & TX4939_CCFG_PCI66))
32 pciclk /= 2;
33 printk(KERN_CONT "Internal(%u.%uMHz)",
34 (pciclk + 50000) / 1000000,
35 ((pciclk + 50000) / 100000) % 10);
36 } else {
37 printk(KERN_CONT "External");
38 pciclk = -1;
39 }
40 printk(KERN_CONT "\n");
41 return pciclk;
42 }
43
tx4939_report_pci1clk(void)44 void __init tx4939_report_pci1clk(void)
45 {
46 unsigned int pciclk = txx9_master_clock * 20 / 6;
47
48 pr_info("PCIC1 -- PCICLK:%u.%uMHz\n",
49 (pciclk + 50000) / 1000000,
50 ((pciclk + 50000) / 100000) % 10);
51 }
52
tx4939_pcic1_map_irq(const struct pci_dev * dev,u8 slot)53 int __init tx4939_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
54 {
55 if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4939_pcic1ptr) {
56 switch (slot) {
57 case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
58 if (__raw_readq(&tx4939_ccfgptr->pcfg) &
59 TX4939_PCFG_ET0MODE)
60 return TXX9_IRQ_BASE + TX4939_IR_ETH(0);
61 break;
62 case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
63 if (__raw_readq(&tx4939_ccfgptr->pcfg) &
64 TX4939_PCFG_ET1MODE)
65 return TXX9_IRQ_BASE + TX4939_IR_ETH(1);
66 break;
67 }
68 return 0;
69 }
70 return -1;
71 }
72
tx4939_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)73 int __init tx4939_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
74 {
75 int irq = tx4939_pcic1_map_irq(dev, slot);
76
77 if (irq >= 0)
78 return irq;
79 irq = pin;
80 /* IRQ rotation */
81 irq--; /* 0-3 */
82 irq = (irq + 33 - slot) % 4;
83 irq++; /* 1-4 */
84
85 switch (irq) {
86 case 1:
87 irq = TXX9_IRQ_BASE + TX4939_IR_INTA;
88 break;
89 case 2:
90 irq = TXX9_IRQ_BASE + TX4939_IR_INTB;
91 break;
92 case 3:
93 irq = TXX9_IRQ_BASE + TX4939_IR_INTC;
94 break;
95 case 4:
96 irq = TXX9_IRQ_BASE + TX4939_IR_INTD;
97 break;
98 }
99 return irq;
100 }
101
tx4939_setup_pcierr_irq(void)102 void __init tx4939_setup_pcierr_irq(void)
103 {
104 if (request_irq(TXX9_IRQ_BASE + TX4939_IR_PCIERR,
105 tx4927_pcierr_interrupt,
106 IRQF_DISABLED, "PCI error",
107 (void *)TX4939_PCIC_REG))
108 pr_warning("Failed to request irq for PCIERR\n");
109 }
110