1 /*
2 * SMP support for BPA machines.
3 *
4 * Dave Engebretsen, Peter Bergner, and
5 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
6 *
7 * Plus various changes from other IBM teams...
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #undef DEBUG
16
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/sched.h>
20 #include <linux/smp.h>
21 #include <linux/interrupt.h>
22 #include <linux/delay.h>
23 #include <linux/init.h>
24 #include <linux/spinlock.h>
25 #include <linux/cache.h>
26 #include <linux/err.h>
27 #include <linux/sysdev.h>
28 #include <linux/cpu.h>
29
30 #include <asm/ptrace.h>
31 #include <asm/atomic.h>
32 #include <asm/irq.h>
33 #include <asm/page.h>
34 #include <asm/pgtable.h>
35 #include <asm/io.h>
36 #include <asm/prom.h>
37 #include <asm/smp.h>
38 #include <asm/paca.h>
39 #include <asm/time.h>
40 #include <asm/machdep.h>
41 #include <asm/cputable.h>
42 #include <asm/firmware.h>
43 #include <asm/system.h>
44 #include <asm/rtas.h>
45 #include <asm/cputhreads.h>
46
47 #include "interrupt.h"
48 #include <asm/udbg.h>
49
50 #ifdef DEBUG
51 #define DBG(fmt...) udbg_printf(fmt)
52 #else
53 #define DBG(fmt...)
54 #endif
55
56 /*
57 * The Primary thread of each non-boot processor was started from the OF client
58 * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop.
59 */
60 static cpumask_t of_spin_map;
61
62 extern void generic_secondary_smp_init(unsigned long);
63
64 /**
65 * smp_startup_cpu() - start the given cpu
66 *
67 * At boot time, there is nothing to do for primary threads which were
68 * started from Open Firmware. For anything else, call RTAS with the
69 * appropriate start location.
70 *
71 * Returns:
72 * 0 - failure
73 * 1 - success
74 */
smp_startup_cpu(unsigned int lcpu)75 static inline int __devinit smp_startup_cpu(unsigned int lcpu)
76 {
77 int status;
78 unsigned long start_here = __pa((u32)*((unsigned long *)
79 generic_secondary_smp_init));
80 unsigned int pcpu;
81 int start_cpu;
82
83 if (cpu_isset(lcpu, of_spin_map))
84 /* Already started by OF and sitting in spin loop */
85 return 1;
86
87 pcpu = get_hard_smp_processor_id(lcpu);
88
89 /* Fixup atomic count: it exited inside IRQ handler. */
90 task_thread_info(paca[lcpu].__current)->preempt_count = 0;
91
92 /*
93 * If the RTAS start-cpu token does not exist then presume the
94 * cpu is already spinning.
95 */
96 start_cpu = rtas_token("start-cpu");
97 if (start_cpu == RTAS_UNKNOWN_SERVICE)
98 return 1;
99
100 status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);
101 if (status != 0) {
102 printk(KERN_ERR "start-cpu failed: %i\n", status);
103 return 0;
104 }
105
106 return 1;
107 }
108
smp_iic_message_pass(int target,int msg)109 static void smp_iic_message_pass(int target, int msg)
110 {
111 unsigned int i;
112
113 if (target < NR_CPUS) {
114 iic_cause_IPI(target, msg);
115 } else {
116 for_each_online_cpu(i) {
117 if (target == MSG_ALL_BUT_SELF
118 && i == smp_processor_id())
119 continue;
120 iic_cause_IPI(i, msg);
121 }
122 }
123 }
124
smp_iic_probe(void)125 static int __init smp_iic_probe(void)
126 {
127 iic_request_IPIs();
128
129 return cpus_weight(cpu_possible_map);
130 }
131
smp_cell_setup_cpu(int cpu)132 static void __devinit smp_cell_setup_cpu(int cpu)
133 {
134 if (cpu != boot_cpuid)
135 iic_setup_cpu();
136
137 /*
138 * change default DABRX to allow user watchpoints
139 */
140 mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
141 }
142
143 static DEFINE_SPINLOCK(timebase_lock);
144 static unsigned long timebase = 0;
145
cell_give_timebase(void)146 static void __devinit cell_give_timebase(void)
147 {
148 spin_lock(&timebase_lock);
149 rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
150 timebase = get_tb();
151 spin_unlock(&timebase_lock);
152
153 while (timebase)
154 barrier();
155 rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL);
156 }
157
cell_take_timebase(void)158 static void __devinit cell_take_timebase(void)
159 {
160 while (!timebase)
161 barrier();
162 spin_lock(&timebase_lock);
163 set_tb(timebase >> 32, timebase & 0xffffffff);
164 timebase = 0;
165 spin_unlock(&timebase_lock);
166 }
167
smp_cell_kick_cpu(int nr)168 static void __devinit smp_cell_kick_cpu(int nr)
169 {
170 BUG_ON(nr < 0 || nr >= NR_CPUS);
171
172 if (!smp_startup_cpu(nr))
173 return;
174
175 /*
176 * The processor is currently spinning, waiting for the
177 * cpu_start field to become non-zero After we set cpu_start,
178 * the processor will continue on to secondary_start
179 */
180 paca[nr].cpu_start = 1;
181 }
182
smp_cell_cpu_bootable(unsigned int nr)183 static int smp_cell_cpu_bootable(unsigned int nr)
184 {
185 /* Special case - we inhibit secondary thread startup
186 * during boot if the user requests it. Odd-numbered
187 * cpus are assumed to be secondary threads.
188 */
189 if (system_state < SYSTEM_RUNNING &&
190 cpu_has_feature(CPU_FTR_SMT) &&
191 !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
192 return 0;
193
194 return 1;
195 }
196 static struct smp_ops_t bpa_iic_smp_ops = {
197 .message_pass = smp_iic_message_pass,
198 .probe = smp_iic_probe,
199 .kick_cpu = smp_cell_kick_cpu,
200 .setup_cpu = smp_cell_setup_cpu,
201 .cpu_bootable = smp_cell_cpu_bootable,
202 };
203
204 /* This is called very early */
smp_init_cell(void)205 void __init smp_init_cell(void)
206 {
207 int i;
208
209 DBG(" -> smp_init_cell()\n");
210
211 smp_ops = &bpa_iic_smp_ops;
212
213 /* Mark threads which are still spinning in hold loops. */
214 if (cpu_has_feature(CPU_FTR_SMT)) {
215 for_each_present_cpu(i) {
216 if (cpu_thread_in_core(i) == 0)
217 cpu_set(i, of_spin_map);
218 }
219 } else {
220 of_spin_map = cpu_present_map;
221 }
222
223 cpu_clear(boot_cpuid, of_spin_map);
224
225 /* Non-lpar has additional take/give timebase */
226 if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
227 smp_ops->give_timebase = cell_give_timebase;
228 smp_ops->take_timebase = cell_take_timebase;
229 }
230
231 DBG(" <- smp_init_cell()\n");
232 }
233