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1 /*
2  *  cx18 header containing common defines.
3  *
4  *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
5  *
6  *  This program is free software; you can redistribute it and/or modify
7  *  it under the terms of the GNU General Public License as published by
8  *  the Free Software Foundation; either version 2 of the License, or
9  *  (at your option) any later version.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19  *  02111-1307  USA
20  */
21 
22 #ifndef CX23418_H
23 #define CX23418_H
24 
25 #include <media/cx2341x.h>
26 
27 #define MGR_CMD_MASK            		0x40000000
28 /* The MSB of the command code indicates that this is the completion of a
29    command */
30 #define MGR_CMD_MASK_ACK        		(MGR_CMD_MASK | 0x80000000)
31 
32 /* Description: This command creates a new instance of a certain task
33    IN[0]  - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is
34 	    the processor on which the task YYY will be created
35    OUT[0] - Task handle. This handle is passed along with commands to
36 	    dispatch to the right instance of the task
37    ReturnCode - One of the ERR_SYS_... */
38 #define CX18_CREATE_TASK      			(MGR_CMD_MASK | 0x0001)
39 
40 /* Description: This command destroys an instance of a task
41    IN[0] - Task handle. Hanlde of the task to destroy
42    ReturnCode - One of the ERR_SYS_... */
43 #define CX18_DESTROY_TASK     			(MGR_CMD_MASK | 0x0002)
44 
45 /* All commands for CPU have the following mask set */
46 #define CPU_CMD_MASK                        	0x20000000
47 #define CPU_CMD_MASK_DEBUG       		(CPU_CMD_MASK | 0x00000000)
48 #define CPU_CMD_MASK_ACK                    	(CPU_CMD_MASK | 0x80000000)
49 #define CPU_CMD_MASK_CAPTURE                	(CPU_CMD_MASK | 0x00020000)
50 #define CPU_CMD_MASK_TS                     	(CPU_CMD_MASK | 0x00040000)
51 
52 #define EPU_CMD_MASK                        	0x02000000
53 #define EPU_CMD_MASK_DEBUG       		(EPU_CMD_MASK | 0x000000)
54 #define EPU_CMD_MASK_DE                     	(EPU_CMD_MASK | 0x040000)
55 
56 #define APU_CMD_MASK 				0x10000000
57 #define APU_CMD_MASK_ACK 			(APU_CMD_MASK | 0x80000000)
58 
59 #define CX18_APU_RESETAI 			(APU_CMD_MASK | 0x05)
60 
61 /* Description: This command indicates that a Memory Descriptor List has been
62    filled with the requested channel type
63    IN[0] - Task handle. Handle of the task
64    IN[1] - Offset of the MDL_ACK from the beginning of the local DDR.
65    IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1]
66    ReturnCode - One of the ERR_DE_... */
67 #define CX18_EPU_DMA_DONE              		(EPU_CMD_MASK_DE | 0x0001)
68 
69 /* Something interesting happened
70    IN[0] - A value to log
71    IN[1] - An offset of a string in the MiniMe memory;
72 	   0/zero/NULL means "I have nothing to say" */
73 #define CX18_EPU_DEBUG 				(EPU_CMD_MASK_DEBUG | 0x0003)
74 
75 /* Reads memory/registers (32-bit)
76    IN[0] - Address
77    OUT[1] - Value */
78 #define CX18_CPU_DEBUG_PEEK32			(CPU_CMD_MASK_DEBUG | 0x0003)
79 
80 /* Description: This command starts streaming with the set channel type
81    IN[0] - Task handle. Handle of the task to start
82    ReturnCode - One of the ERR_CAPTURE_... */
83 #define CX18_CPU_CAPTURE_START               	(CPU_CMD_MASK_CAPTURE | 0x0002)
84 
85 /* Description: This command stops streaming with the set channel type
86    IN[0] - Task handle. Handle of the task to stop
87    IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only)
88    ReturnCode - One of the ERR_CAPTURE_... */
89 #define CX18_CPU_CAPTURE_STOP                	(CPU_CMD_MASK_CAPTURE | 0x0003)
90 
91 /* Description: This command pauses streaming with the set channel type
92    IN[0] - Task handle. Handle of the task to pause
93    ReturnCode - One of the ERR_CAPTURE_... */
94 #define CX18_CPU_CAPTURE_PAUSE               	(CPU_CMD_MASK_CAPTURE | 0x0007)
95 
96 /* Description: This command resumes streaming with the set channel type
97    IN[0] - Task handle. Handle of the task to resume
98    ReturnCode - One of the ERR_CAPTURE_... */
99 #define CX18_CPU_CAPTURE_RESUME              	(CPU_CMD_MASK_CAPTURE | 0x0008)
100 
101 #define CAPTURE_CHANNEL_TYPE_NONE  		0
102 #define CAPTURE_CHANNEL_TYPE_MPEG  		1
103 #define CAPTURE_CHANNEL_TYPE_INDEX 		2
104 #define CAPTURE_CHANNEL_TYPE_YUV   		3
105 #define CAPTURE_CHANNEL_TYPE_PCM   		4
106 #define CAPTURE_CHANNEL_TYPE_VBI   		5
107 #define CAPTURE_CHANNEL_TYPE_SLICED_VBI		6
108 #define CAPTURE_CHANNEL_TYPE_TS			7
109 #define CAPTURE_CHANNEL_TYPE_MAX   		15
110 
111 /* Description: This command sets the channel type. This can only be done
112    when stopped.
113    IN[0] - Task handle. Handle of the task to start
114    IN[1] - Channel Type. See Below.
115    ReturnCode - One of the ERR_CAPTURE_... */
116 #define CX18_CPU_SET_CHANNEL_TYPE      		(CPU_CMD_MASK_CAPTURE + 1)
117 
118 /* Description: Set stream output type
119    IN[0] - task handle. Handle of the task to start
120    IN[1] - type
121    ReturnCode - One of the ERR_CAPTURE_... */
122 #define CX18_CPU_SET_STREAM_OUTPUT_TYPE		(CPU_CMD_MASK_CAPTURE | 0x0012)
123 
124 /* Description: Set video input resolution and frame rate
125    IN[0] - task handle
126    IN[1] - reserved
127    IN[2] - reserved
128    IN[3] - reserved
129    IN[4] - reserved
130    IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s
131    ReturnCode - One of the ERR_CAPTURE_... */
132 #define CX18_CPU_SET_VIDEO_IN                	(CPU_CMD_MASK_CAPTURE | 0x0004)
133 
134 /* Description: Set video frame rate
135    IN[0] - task handle. Handle of the task to start
136    IN[1] - video bit rate mode
137    IN[2] - video average rate
138    IN[3] - video peak rate
139    IN[4] - system mux rate
140    ReturnCode - One of the ERR_CAPTURE_... */
141 #define CX18_CPU_SET_VIDEO_RATE              	(CPU_CMD_MASK_CAPTURE | 0x0005)
142 
143 /* Description: Set video output resolution
144    IN[0] - task handle
145    IN[1] - horizontal size
146    IN[2] - vertical size
147    ReturnCode - One of the ERR_CAPTURE_... */
148 #define CX18_CPU_SET_VIDEO_RESOLUTION		(CPU_CMD_MASK_CAPTURE | 0x0006)
149 
150 /* Description: This command set filter parameters
151    IN[0] - Task handle. Handle of the task
152    IN[1] - type, 0 - temporal, 1 - spatial, 2 - median
153    IN[2] - mode,  temporal/spatial: 0 - disable, 1 - static, 2 - dynamic
154 			median:	0 = disable, 1 = horizontal, 2 = vertical,
155 				3 = horizontal/vertical, 4 = diagonal
156    IN[3] - strength, temporal 0 - 31, spatial 0 - 15
157    ReturnCode - One of the ERR_CAPTURE_... */
158 #define CX18_CPU_SET_FILTER_PARAM            	(CPU_CMD_MASK_CAPTURE | 0x0009)
159 
160 /* Description: This command set spatial filter type
161    IN[0] - Task handle.
162    IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only,
163 		      3 = 2D H/V separable, 4 = 2D symmetric non-separable
164    IN[2] - chroma type: 0 - diable, 1 = 1D horizontal
165    ReturnCode - One of the ERR_CAPTURE_... */
166 #define CX18_CPU_SET_SPATIAL_FILTER_TYPE     	(CPU_CMD_MASK_CAPTURE | 0x000C)
167 
168 /* Description: This command set coring levels for median filter
169    IN[0] - Task handle.
170    IN[1] - luma_high
171    IN[2] - luma_low
172    IN[3] - chroma_high
173    IN[4] - chroma_low
174    ReturnCode - One of the ERR_CAPTURE_... */
175 #define CX18_CPU_SET_MEDIAN_CORING           	(CPU_CMD_MASK_CAPTURE | 0x000E)
176 
177 /* Description: This command set the picture type mask for index file
178    IN[0] - 	0 = disable index file output
179 			1 = output I picture
180 			2 = P picture
181 			4 = B picture
182 			other = illegal */
183 #define CX18_CPU_SET_INDEXTABLE         	(CPU_CMD_MASK_CAPTURE | 0x0010)
184 
185 /* Description: Set audio parameters
186    IN[0] - task handle. Handle of the task to start
187    IN[1] - audio parameter
188    ReturnCode - One of the ERR_CAPTURE_... */
189 #define CX18_CPU_SET_AUDIO_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0011)
190 
191 /* Description: Set video mute
192    IN[0] - task handle. Handle of the task to start
193    IN[1] - bit31-24: muteYvalue
194 	   bit23-16: muteUvalue
195 	   bit15-8:  muteVvalue
196 	   bit0:     1:mute, 0: unmute
197    ReturnCode - One of the ERR_CAPTURE_... */
198 #define CX18_CPU_SET_VIDEO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0013)
199 
200 /* Description: Set audio mute
201    IN[0] - task handle. Handle of the task to start
202    IN[1] - mute/unmute
203    ReturnCode - One of the ERR_CAPTURE_... */
204 #define CX18_CPU_SET_AUDIO_MUTE			(CPU_CMD_MASK_CAPTURE | 0x0014)
205 
206 /* Description: Set stream output type
207    IN[0] - task handle. Handle of the task to start
208    IN[1] - subType
209 	    SET_INITIAL_SCR      		1
210 	    SET_QUALITY_MODE            2
211 	    SET_VIM_PROTECT_MODE        3
212 	    SET_PTS_CORRECTION          4
213 	    SET_USB_FLUSH_MODE          5
214 	    SET_MERAQPAR_ENABLE         6
215 	    SET_NAV_PACK_INSERTION      7
216 	    SET_SCENE_CHANGE_ENABLE     8
217    IN[2] - parameter 1
218    IN[3] - parameter 2
219    ReturnCode - One of the ERR_CAPTURE_... */
220 #define CX18_CPU_SET_MISC_PARAMETERS		(CPU_CMD_MASK_CAPTURE | 0x0015)
221 
222 /* Description: Set raw VBI parameters
223    IN[0] - Task handle
224    IN[1] - No. of input lines per field:
225 				bit[15:0]: field 1,
226 				bit[31:16]: field 2
227    IN[2] - No. of input bytes per line
228    IN[3] - No. of output frames per transfer
229    IN[4] - start code
230    IN[5] - stop code
231    ReturnCode */
232 #define CX18_CPU_SET_RAW_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0016)
233 
234 /* Description: Set capture line No.
235    IN[0] - task handle. Handle of the task to start
236    IN[1] - height1
237    IN[2] - height2
238    ReturnCode - One of the ERR_CAPTURE_... */
239 #define CX18_CPU_SET_CAPTURE_LINE_NO		(CPU_CMD_MASK_CAPTURE | 0x0017)
240 
241 /* Description: Set copyright
242    IN[0] - task handle. Handle of the task to start
243    IN[1] - copyright
244    ReturnCode - One of the ERR_CAPTURE_... */
245 #define CX18_CPU_SET_COPYRIGHT			(CPU_CMD_MASK_CAPTURE | 0x0018)
246 
247 /* Description: Set audio PID
248    IN[0] - task handle. Handle of the task to start
249    IN[1] - PID
250    ReturnCode - One of the ERR_CAPTURE_... */
251 #define CX18_CPU_SET_AUDIO_PID			(CPU_CMD_MASK_CAPTURE | 0x0019)
252 
253 /* Description: Set video PID
254    IN[0] - task handle. Handle of the task to start
255    IN[1] - PID
256    ReturnCode - One of the ERR_CAPTURE_... */
257 #define CX18_CPU_SET_VIDEO_PID			(CPU_CMD_MASK_CAPTURE | 0x001A)
258 
259 /* Description: Set Vertical Crop Line
260    IN[0] - task handle. Handle of the task to start
261    IN[1] - Line
262    ReturnCode - One of the ERR_CAPTURE_... */
263 #define CX18_CPU_SET_VER_CROP_LINE		(CPU_CMD_MASK_CAPTURE | 0x001B)
264 
265 /* Description: Set COP structure
266    IN[0] - task handle. Handle of the task to start
267    IN[1] - M
268    IN[2] - N
269    ReturnCode - One of the ERR_CAPTURE_... */
270 #define CX18_CPU_SET_GOP_STRUCTURE		(CPU_CMD_MASK_CAPTURE | 0x001C)
271 
272 /* Description: Set Scene Change Detection
273    IN[0] - task handle. Handle of the task to start
274    IN[1] - scene change
275    ReturnCode - One of the ERR_CAPTURE_... */
276 #define CX18_CPU_SET_SCENE_CHANGE_DETECTION	(CPU_CMD_MASK_CAPTURE | 0x001D)
277 
278 /* Description: Set Aspect Ratio
279    IN[0] - task handle. Handle of the task to start
280    IN[1] - AspectRatio
281    ReturnCode - One of the ERR_CAPTURE_... */
282 #define CX18_CPU_SET_ASPECT_RATIO		(CPU_CMD_MASK_CAPTURE | 0x001E)
283 
284 /* Description: Set Skip Input Frame
285    IN[0] - task handle. Handle of the task to start
286    IN[1] - skip input frames
287    ReturnCode - One of the ERR_CAPTURE_... */
288 #define CX18_CPU_SET_SKIP_INPUT_FRAME		(CPU_CMD_MASK_CAPTURE | 0x001F)
289 
290 /* Description: Set sliced VBI parameters -
291    Note This API will only apply to MPEG and Sliced VBI Channels
292    IN[0] - Task handle
293    IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext
294    IN[2] - start / stop line
295 			bit[15:0] start line number
296 			bit[31:16] stop line number
297    IN[3] - number of output frames per interrupt
298    IN[4] - VBI insertion mode
299 			bit 0:	output user data, 1 - enable
300 			bit 1:	output private stream, 1 - enable
301 			bit 2:	mux option, 0 - in GOP, 1 - in picture
302 			bit[7:0] 	private stream ID
303    IN[5] - insertion period while mux option is in picture
304    ReturnCode - VBI data offset */
305 #define CX18_CPU_SET_SLICED_VBI_PARAM		(CPU_CMD_MASK_CAPTURE | 0x0020)
306 
307 /* Description: Set the user data place holder
308    IN[0] - type of data (0 for user)
309    IN[1] - Stuffing period
310    IN[2] - ID data size in word (less than 10)
311    IN[3] - Pointer to ID buffer */
312 #define CX18_CPU_SET_USERDATA_PLACE_HOLDER	(CPU_CMD_MASK_CAPTURE | 0x0021)
313 
314 
315 /* Description:
316    In[0] Task Handle
317    return parameter:
318    Out[0]  Reserved
319    Out[1]  Video PTS bit[32:2] of last output video frame.
320    Out[2]  Video PTS bit[ 1:0] of last output video frame.
321    Out[3]  Hardware Video PTS counter bit[31:0],
322 	     these bits get incremented on every 90kHz clock tick.
323    Out[4]  Hardware Video PTS counter bit32,
324 	     these bits get incremented on every 90kHz clock tick.
325    ReturnCode */
326 #define CX18_CPU_GET_ENC_PTS			(CPU_CMD_MASK_CAPTURE | 0x0022)
327 
328 /* Below is the list of commands related to the data exchange */
329 #define CPU_CMD_MASK_DE 			(CPU_CMD_MASK | 0x040000)
330 
331 /* Description: This command provides the physical base address of the local
332    DDR as viewed by EPU
333    IN[0] - Physical offset where EPU has the local DDR mapped
334    ReturnCode - One of the ERR_DE_... */
335 #define CPU_CMD_DE_SetBase 			(CPU_CMD_MASK_DE | 0x0001)
336 
337 /* Description: This command provides the offsets in the device memory where
338    the 2 cx18_mdl_ack blocks reside
339    IN[0] - Task handle. Handle of the task to start
340    IN[1] - Offset of the first cx18_mdl_ack from the beginning of the
341 	   local DDR.
342    IN[2] - Offset of the second cx18_mdl_ack from the beginning of the
343 	   local DDR.
344    ReturnCode - One of the ERR_DE_... */
345 #define CX18_CPU_DE_SET_MDL_ACK                	(CPU_CMD_MASK_DE | 0x0002)
346 
347 /* Description: This command provides the offset to a Memory Descriptor List
348    IN[0] - Task handle. Handle of the task to start
349    IN[1] - Offset of the MDL from the beginning of the local DDR.
350    IN[2] - Number of cx18_mdl structures in the array pointed to by IN[1]
351    IN[3] - Buffer ID
352    IN[4] - Total buffer length
353    ReturnCode - One of the ERR_DE_... */
354 #define CX18_CPU_DE_SET_MDL                   	(CPU_CMD_MASK_DE | 0x0005)
355 
356 /* Description: This command requests return of all current Memory
357    Descriptor Lists to the driver
358    IN[0] - Task handle. Handle of the task to start
359    ReturnCode - One of the ERR_DE_... */
360 #define CX18_CPU_DE_RELEASE_MDL               	(CPU_CMD_MASK_DE | 0x0006)
361 
362 /* Description: This command signals the cpu that the dat buffer has been
363    consumed and ready for re-use.
364    IN[0] - Task handle. Handle of the task
365    IN[1] - Offset of the data block from the beginning of the local DDR.
366    IN[2] - Number of bytes in the data block
367    ReturnCode - One of the ERR_DE_... */
368 /* #define CX18_CPU_DE_RELEASE_BUFFER           (CPU_CMD_MASK_DE | 0x0007) */
369 
370 /* No Error / Success */
371 #define CNXT_OK                 0x000000
372 
373 /* Received unknown command */
374 #define CXERR_UNK_CMD           0x000001
375 
376 /* First parameter in the command is invalid */
377 #define CXERR_INVALID_PARAM1    0x000002
378 
379 /* Second parameter in the command is invalid */
380 #define CXERR_INVALID_PARAM2    0x000003
381 
382 /* Device interface is not open/found */
383 #define CXERR_DEV_NOT_FOUND     0x000004
384 
385 /* Requested function is not implemented/available */
386 #define CXERR_NOTSUPPORTED      0x000005
387 
388 /* Invalid pointer is provided */
389 #define CXERR_BADPTR            0x000006
390 
391 /* Unable to allocate memory */
392 #define CXERR_NOMEM             0x000007
393 
394 /* Object/Link not found */
395 #define CXERR_LINK              0x000008
396 
397 /* Device busy, command cannot be executed */
398 #define CXERR_BUSY              0x000009
399 
400 /* File/device/handle is not open. */
401 #define CXERR_NOT_OPEN          0x00000A
402 
403 /* Value is out of range */
404 #define CXERR_OUTOFRANGE        0x00000B
405 
406 /* Buffer overflow */
407 #define CXERR_OVERFLOW          0x00000C
408 
409 /* Version mismatch */
410 #define CXERR_BADVER            0x00000D
411 
412 /* Operation timed out */
413 #define CXERR_TIMEOUT           0x00000E
414 
415 /* Operation aborted */
416 #define CXERR_ABORT             0x00000F
417 
418 /* Specified I2C device not found for read/write */
419 #define CXERR_I2CDEV_NOTFOUND   0x000010
420 
421 /* Error in I2C data xfer (but I2C device is present) */
422 #define CXERR_I2CDEV_XFERERR    0x000011
423 
424 /* Chanel changing component not ready */
425 #define CXERR_CHANNELNOTREADY   0x000012
426 
427 /* PPU (Presensation/Decoder) mail box is corrupted */
428 #define CXERR_PPU_MB_CORRUPT    0x000013
429 
430 /* CPU (Capture/Encoder) mail box is corrupted */
431 #define CXERR_CPU_MB_CORRUPT    0x000014
432 
433 /* APU (Audio) mail box is corrupted */
434 #define CXERR_APU_MB_CORRUPT    0x000015
435 
436 /* Unable to open file for reading */
437 #define CXERR_FILE_OPEN_READ    0x000016
438 
439 /* Unable to open file for writing */
440 #define CXERR_FILE_OPEN_WRITE   0x000017
441 
442 /* Unable to find the I2C section specified */
443 #define CXERR_I2C_BADSECTION    0x000018
444 
445 /* Error in I2C data xfer (but I2C device is present) */
446 #define CXERR_I2CDEV_DATALOW    0x000019
447 
448 /* Error in I2C data xfer (but I2C device is present) */
449 #define CXERR_I2CDEV_CLOCKLOW   0x00001A
450 
451 /* No Interrupt received from HW (for I2C access) */
452 #define CXERR_NO_HW_I2C_INTR    0x00001B
453 
454 /* RPU is not ready to accept commands! */
455 #define CXERR_RPU_NOT_READY     0x00001C
456 
457 /* RPU is not ready to accept commands! */
458 #define CXERR_RPU_NO_ACK        0x00001D
459 
460 /* The are no buffers ready. Try again soon! */
461 #define CXERR_NODATA_AGAIN      0x00001E
462 
463 /* The stream is stopping. Function not alllowed now! */
464 #define CXERR_STOPPING_STATUS   0x00001F
465 
466 /* Trying to access hardware when the power is turned OFF */
467 #define CXERR_DEVPOWER_OFF      0x000020
468 
469 #endif /* CX23418_H */
470