Searched refs:AT91_AIC (Results 1 – 9 of 9) sorted by relevance
19 #define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */27 #define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */28 #define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */29 #define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */30 #define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */33 #define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */34 #define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */35 #define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */39 #define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */40 #define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */[all …]
20 ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral27 …ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to pro…28 ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number30 …streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it n…
45 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ macro
74 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) macro
85 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ macro
81 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) macro
89 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) macro
93 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) macro
91 #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) macro