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Searched refs:AT91_AIC_EOICR (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-at91/include/mach/
Dirqs.h34 #define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0)
Dat91_aic.h43 #define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ macro
Dentry-macro.S30 …streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it n…
/arch/arm/mach-at91/
Dirq.c152 at91_sys_write(AT91_AIC_EOICR, 0); in at91_aic_init()