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Searched refs:AT91_PMC (Results 1 – 8 of 8) sorted by relevance

/arch/arm/mach-at91/include/mach/
Dat91_pmc.h19 #define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */
20 #define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */
22 #define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */
38 #define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */
39 #define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
40 #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
42 #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */
48 #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
53 #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
57 #define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */
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Dat91sam9261.h79 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
Dat91rm9200.h91 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ macro
Dat91sam9rl.h87 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
Dat91sam9263.h95 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
Dat91cap9.h98 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
Dat91sam9260.h96 #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) macro
/arch/arm/mach-at91/
Dpm_slowclock.S59 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
73 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
87 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
101 ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
147 ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
154 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
165 str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
171 ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
176 str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
181 ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
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