Searched refs:BASE (Results 1 – 8 of 8) sorted by relevance
| /arch/mips/lemote/lm2e/ |
| D | dbg_io.c | 63 #define BASE (0xffffffffbfd003f8) macro
65 #define BASE (0xbfd003f8) macro
92 #define UART16550_READ(y) readb((char *)BASE + (y))
93 #define UART16550_WRITE(y, z) writeb(z, (char *)BASE + (y))
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| /arch/sparc/kernel/ |
| D | sun4v_tlb_miss.S | 10 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
11 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
12 ldx [BASE + HV_FAULT_I_CTX_OFFSET], CTX;
15 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
16 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
17 ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX;
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| /arch/x86/crypto/ |
| D | aes-x86_64-asm_64.S | 20 #define BASE crypto_tfm_ctx_offset macro
59 leaq BASE+KEY+48+4(r8),r9; \
65 movl BASE+0(r8),r10 ## E; \
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| /arch/mips/include/asm/mips-boards/ |
| D | bonito64.h | 416 #define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBAS… argument
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| /arch/m68k/include/asm/ |
| D | mcfsmc.h | 175 outw(0x0067, ioaddr + BASE); in smc_remap()
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| /arch/mips/kernel/ |
| D | traps.c | 453 #define BASE 0x03e00000 macro
489 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
529 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()
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| /arch/m68k/fpsp040/ |
| D | slogn.S | 356 lea LOGTBL,%a0 | ...BASE ADDRESS OF 1/F AND LOG(F)
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| /arch/m68k/ifpsp060/src/ |
| D | fplsp.S | 8253 lea LOGTBL(%pc),%a0 # BASE ADDRESS OF 1/F AND LOG(F)
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