Searched refs:CPLB_PORTPRIO (Results 1 – 4 of 4) sorted by relevance
35 #define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO)
650 #define CPLB_PORTPRIO 0x00000200 /* 0=low priority port, 1= high macro
72 i_data = i_cache | CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4MB; in generate_cplb_tables_cpu()
236 i_data = CPLB_VALID | CPLB_PORTPRIO | PAGE_SIZE_4KB; in icplb_miss()