Searched refs:CPLB_WT (Results 1 – 5 of 5) sorted by relevance
53 #define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW | CPLB_COMMON)109 #define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT
673 #define CPLB_WT 0x00004000 /* 0=write-back, 1=write-through */ macro
157 d_data |= CPLB_L1_AOW | CPLB_WT; in dcplb_miss()301 if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) && in dcplb_protection_fault()372 d_data |= CPLB_L1_AOW | CPLB_WT; in set_mask_dcplbs()
56 d_cache |= CPLB_L1_AOW | CPLB_WT; in generate_cplb_tables_cpu()
260 if (!(data & CPLB_WT) && !(data & CPLB_DIRTY) && in dcplb_protection_fault()