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Searched refs:CSR_TIMER4_CLR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-footbridge/include/mach/
Dsystem.h65 *CSR_TIMER4_CLR = 0; in arch_reset()
/arch/arm/include/asm/hardware/
Ddec21285.h138 #define CSR_TIMER4_CLR DC21285_IO(0x036c) macro