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Searched refs:CVMX_CIU_INTX_EN1 (Results 1 – 4 of 4) sorted by relevance

/arch/mips/cavium-octeon/
Docteon-irq.c256 en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); in octeon_irq_ciu1_enable()
258 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); in octeon_irq_ciu1_enable()
259 cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); in octeon_irq_ciu1_enable()
273 en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); in octeon_irq_ciu1_disable()
275 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); in octeon_irq_ciu1_disable()
281 cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1)); in octeon_irq_ciu1_disable()
286 en1 = cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); in octeon_irq_ciu1_disable()
288 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), en1); in octeon_irq_ciu1_disable()
289 cvmx_read_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1)); in octeon_irq_ciu1_disable()
304 cvmx_read_csr(CVMX_CIU_INTX_EN1 in octeon_irq_ciu1_set_affinity()
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Dsmp.c143 cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); in octeon_init_secondary()
144 cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); in octeon_init_secondary()
Dsetup.c595 cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2)), 0); in prom_init()
596 cvmx_write_csr(CVMX_CIU_INTX_EN1((coreid * 2 + 1)), 0); in prom_init()
/arch/mips/include/asm/octeon/
Dcvmx-ciu-defs.h45 #define CVMX_CIU_INTX_EN1(offset) \ macro