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Searched refs:DCPLB_ADDR0 (Results 1 – 7 of 7) sorted by relevance

/arch/blackfin/kernel/cplb-mpu/
Dcacheinit.c53 bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr); in bfin_dcache_init()
Dcplbmgr.c199 bfin_write32(DCPLB_ADDR0 + idx * 4, addr); in dcplb_miss()
381 bfin_write32(DCPLB_ADDR0 + i * 4, addr); in set_mask_dcplbs()
/arch/blackfin/kernel/cplb-nompu/
Dcacheinit.c53 bfin_write32(DCPLB_ADDR0 + i * 4, dcplb_tbl[i].addr); in bfin_dcache_init()
Dcplbmgr.c78 bfin_write32(DCPLB_ADDR0 + idx * 4, addr); in write_dcplb_data()
/arch/blackfin/include/asm/
Dcdef_LPBlackfin.h50 #define bfin_read_DCPLB_ADDR0() bfin_read32(DCPLB_ADDR0)
51 #define bfin_write_DCPLB_ADDR0(val) bfin_write32(DCPLB_ADDR0,val)
Ddef_LPBlackfin.h269 #define DCPLB_ADDR0 0xFFE00100 /* Data Cache Protection Lookaside macro
/arch/blackfin/mach-common/
Ddpmc_modes.S414 PM_PUSH(DCPLB_ADDR0)
710 PM_POP(DCPLB_ADDR0)