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Searched refs:DCPLB_ADDR5 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/include/asm/
Dcdef_LPBlackfin.h60 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
61 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
Ddef_LPBlackfin.h284 #define DCPLB_ADDR5 0xFFE00114 /* Data Cacheability Protection macro
/arch/blackfin/mach-common/
Ddpmc_modes.S419 PM_PUSH(DCPLB_ADDR5)
705 PM_POP(DCPLB_ADDR5)